<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.14"/>
<meta name="viewport" content="width=device-width, initial-scale=1"/>
<title>sdps: Sdps_v2_5</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtreedata.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
  <td id="projectalign" style="padding-left: 0.5em;">
   <div id="projectname">sdps
   </div>
   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.14 -->
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
$(function() {
  initMenu('',false,false,'search.php','Search');
});
</script>
<div id="main-nav"></div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('group__sdps__v2__5.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">Sdps_v2_5</div>  </div>
</div><!--header-->
<div class="contents">
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html">XSdPs_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_sd_ps___config.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps.html">XSdPs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> driver instance data.  <a href="struct_x_sd_ps.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:gad5f983cd6daadb92a96fa4e7674541cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad5f983cd6daadb92a96fa4e7674541cc">XSDPS_CT_ERROR</a>&#160;&#160;&#160;0x2U</td></tr>
<tr class="memdesc:gad5f983cd6daadb92a96fa4e7674541cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command timeout flag.  <a href="#gad5f983cd6daadb92a96fa4e7674541cc">More...</a><br /></td></tr>
<tr class="separator:gad5f983cd6daadb92a96fa4e7674541cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7596df11ad001d37fd1f4482a817270"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaf7596df11ad001d37fd1f4482a817270">MAX_TUNING_COUNT</a>&#160;&#160;&#160;40U</td></tr>
<tr class="memdesc:gaf7596df11ad001d37fd1f4482a817270"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Tuning count.  <a href="#gaf7596df11ad001d37fd1f4482a817270">More...</a><br /></td></tr>
<tr class="separator:gaf7596df11ad001d37fd1f4482a817270"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga959b013962a6b53aa1c52f8ed78153be"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga959b013962a6b53aa1c52f8ed78153be">XSdPs_FrameCmd</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u32 Cmd)</td></tr>
<tr class="memdesc:ga959b013962a6b53aa1c52f8ed78153be"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function frames the Command register for a particular command.  <a href="#ga959b013962a6b53aa1c52f8ed78153be">More...</a><br /></td></tr>
<tr class="separator:ga959b013962a6b53aa1c52f8ed78153be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1c5c45efb0402b9d8e6a33d036dbd220"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u32 Cmd, u32 Arg, u32 BlkCnt)</td></tr>
<tr class="memdesc:ga1c5c45efb0402b9d8e6a33d036dbd220"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function does SD command generation.  <a href="#ga1c5c45efb0402b9d8e6a33d036dbd220">More...</a><br /></td></tr>
<tr class="separator:ga1c5c45efb0402b9d8e6a33d036dbd220"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf9b8a29b65e1213b11ad22312e5f84be"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaf9b8a29b65e1213b11ad22312e5f84be">XSdPs_SetupADMA2DescTbl</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u32 BlkCnt, const u8 *Buff)</td></tr>
<tr class="memdesc:gaf9b8a29b65e1213b11ad22312e5f84be"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to setup ADMA2 descriptor table.  <a href="#gaf9b8a29b65e1213b11ad22312e5f84be">More...</a><br /></td></tr>
<tr class="separator:gaf9b8a29b65e1213b11ad22312e5f84be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabcd75a06ca4fb42ebcec4526282dffdf"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gabcd75a06ca4fb42ebcec4526282dffdf">XSdPs_CfgInitialize</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, <a class="el" href="struct_x_sd_ps___config.html">XSdPs_Config</a> *ConfigPtr, u32 EffectiveAddr)</td></tr>
<tr class="memdesc:gabcd75a06ca4fb42ebcec4526282dffdf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes a specific <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance such that the driver is ready to use.  <a href="#gabcd75a06ca4fb42ebcec4526282dffdf">More...</a><br /></td></tr>
<tr class="separator:gabcd75a06ca4fb42ebcec4526282dffdf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8e9a576dfdb4440a795eb6e712994050"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga8e9a576dfdb4440a795eb6e712994050">XSdPs_SdCardInitialize</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga8e9a576dfdb4440a795eb6e712994050"><td class="mdescLeft">&#160;</td><td class="mdescRight">SD initialization is done in this function.  <a href="#ga8e9a576dfdb4440a795eb6e712994050">More...</a><br /></td></tr>
<tr class="separator:ga8e9a576dfdb4440a795eb6e712994050"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3c3ab46b98e997b8439af4b149445811"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3c3ab46b98e997b8439af4b149445811">XSdPs_CardInitialize</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga3c3ab46b98e997b8439af4b149445811"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize Card with Identification mode sequence.  <a href="#ga3c3ab46b98e997b8439af4b149445811">More...</a><br /></td></tr>
<tr class="separator:ga3c3ab46b98e997b8439af4b149445811"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8dfe3686ed74d09a2a46a7b5cddcde47"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga8dfe3686ed74d09a2a46a7b5cddcde47">XSdPs_ReadPolled</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u32 Arg, u32 BlkCnt, u8 *Buff)</td></tr>
<tr class="memdesc:ga8dfe3686ed74d09a2a46a7b5cddcde47"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function performs SD read in polled mode.  <a href="#ga8dfe3686ed74d09a2a46a7b5cddcde47">More...</a><br /></td></tr>
<tr class="separator:ga8dfe3686ed74d09a2a46a7b5cddcde47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga69aa57979c1ef9b9ec3fbdc6d8ab7277"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga69aa57979c1ef9b9ec3fbdc6d8ab7277">XSdPs_WritePolled</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u32 Arg, u32 BlkCnt, const u8 *Buff)</td></tr>
<tr class="memdesc:ga69aa57979c1ef9b9ec3fbdc6d8ab7277"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function performs SD write in polled mode.  <a href="#ga69aa57979c1ef9b9ec3fbdc6d8ab7277">More...</a><br /></td></tr>
<tr class="separator:ga69aa57979c1ef9b9ec3fbdc6d8ab7277"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17d43f52a8948d5ec4f315641336d115"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga17d43f52a8948d5ec4f315641336d115">XSdPs_Select_Card</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga17d43f52a8948d5ec4f315641336d115"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects card and sets default block size.  <a href="#ga17d43f52a8948d5ec4f315641336d115">More...</a><br /></td></tr>
<tr class="separator:ga17d43f52a8948d5ec4f315641336d115"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae55b1aa663629e99a9da94619c7487c5"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gae55b1aa663629e99a9da94619c7487c5">XSdPs_MmcCardInitialize</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gae55b1aa663629e99a9da94619c7487c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mmc initialization is done in this function.  <a href="#gae55b1aa663629e99a9da94619c7487c5">More...</a><br /></td></tr>
<tr class="separator:gae55b1aa663629e99a9da94619c7487c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27d6bd37204cdb0c26430efedd8e97eb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_sd_ps___config.html">XSdPs_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga27d6bd37204cdb0c26430efedd8e97eb">XSdPs_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga27d6bd37204cdb0c26430efedd8e97eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="#ga27d6bd37204cdb0c26430efedd8e97eb">More...</a><br /></td></tr>
<tr class="separator:ga27d6bd37204cdb0c26430efedd8e97eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1af3178b4b24c991b431eb7a0aa3b23b"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u16 BlkSize)</td></tr>
<tr class="memdesc:ga1af3178b4b24c991b431eb7a0aa3b23b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Update Block size for read/write operations.  <a href="#ga1af3178b4b24c991b431eb7a0aa3b23b">More...</a><br /></td></tr>
<tr class="separator:ga1af3178b4b24c991b431eb7a0aa3b23b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f8661e4ae53a7c29b3fd44cc56a3673"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1f8661e4ae53a7c29b3fd44cc56a3673">XSdPs_Change_ClkFreq</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u32 SelFreq)</td></tr>
<tr class="memdesc:ga1f8661e4ae53a7c29b3fd44cc56a3673"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to change clock freq to given value.  <a href="#ga1f8661e4ae53a7c29b3fd44cc56a3673">More...</a><br /></td></tr>
<tr class="separator:ga1f8661e4ae53a7c29b3fd44cc56a3673"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf11db1719933123762fecb790a2977da"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaf11db1719933123762fecb790a2977da">XSdPs_Change_BusWidth</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf11db1719933123762fecb790a2977da"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to set bus width to 4-bit in card and host.  <a href="#gaf11db1719933123762fecb790a2977da">More...</a><br /></td></tr>
<tr class="separator:gaf11db1719933123762fecb790a2977da"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6bc000fb4ce51502058f2e351c90fc19"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6bc000fb4ce51502058f2e351c90fc19">XSdPs_Change_BusSpeed</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga6bc000fb4ce51502058f2e351c90fc19"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to set high speed in card and host.  <a href="#ga6bc000fb4ce51502058f2e351c90fc19">More...</a><br /></td></tr>
<tr class="separator:ga6bc000fb4ce51502058f2e351c90fc19"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga779d417f6a1e5d772b017a92485583a1"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga779d417f6a1e5d772b017a92485583a1">XSdPs_Get_BusWidth</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u8 *SCR)</td></tr>
<tr class="memdesc:ga779d417f6a1e5d772b017a92485583a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to get bus width support by card.  <a href="#ga779d417f6a1e5d772b017a92485583a1">More...</a><br /></td></tr>
<tr class="separator:ga779d417f6a1e5d772b017a92485583a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc7e71cb62142d0ef939336195102666"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gafc7e71cb62142d0ef939336195102666">XSdPs_Get_BusSpeed</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u8 *ReadBuff)</td></tr>
<tr class="memdesc:gafc7e71cb62142d0ef939336195102666"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to get bus speed supported by card.  <a href="#gafc7e71cb62142d0ef939336195102666">More...</a><br /></td></tr>
<tr class="separator:gafc7e71cb62142d0ef939336195102666"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0be8518af877aa1fe5f7c6b86ac4f7f8"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0be8518af877aa1fe5f7c6b86ac4f7f8">XSdPs_Pullup</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga0be8518af877aa1fe5f7c6b86ac4f7f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to send pullup command to card before using DAT line 3(using 4-bit bus)  <a href="#ga0be8518af877aa1fe5f7c6b86ac4f7f8">More...</a><br /></td></tr>
<tr class="separator:ga0be8518af877aa1fe5f7c6b86ac4f7f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga69e8d7cd927da4273a12d0d5fb3f36ff"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga69e8d7cd927da4273a12d0d5fb3f36ff">XSdPs_Get_Mmc_ExtCsd</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u8 *ReadBuff)</td></tr>
<tr class="memdesc:ga69e8d7cd927da4273a12d0d5fb3f36ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to get EXT_CSD register of eMMC.  <a href="#ga69e8d7cd927da4273a12d0d5fb3f36ff">More...</a><br /></td></tr>
<tr class="separator:ga69e8d7cd927da4273a12d0d5fb3f36ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaee773eef8e260b4498dc607061eb18f6"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaee773eef8e260b4498dc607061eb18f6">XSdPs_Set_Mmc_ExtCsd</a> (<a class="el" href="struct_x_sd_ps.html">XSdPs</a> *InstancePtr, u32 Arg)</td></tr>
<tr class="memdesc:gaee773eef8e260b4498dc607061eb18f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to write EXT_CSD register of eMMC.  <a href="#gaee773eef8e260b4498dc607061eb18f6">More...</a><br /></td></tr>
<tr class="separator:gaee773eef8e260b4498dc607061eb18f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Register Map</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp092729737d14686054aa21531a3582c6"></a>Register offsets from the base address of an SD device. </p>
</td></tr>
<tr class="memitem:ga1b844dcb0ed53494ee47d19303e8fdee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1b844dcb0ed53494ee47d19303e8fdee">XSDPS_SDMA_SYS_ADDR_OFFSET</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:ga1b844dcb0ed53494ee47d19303e8fdee"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDMA System Address Register.  <a href="#ga1b844dcb0ed53494ee47d19303e8fdee">More...</a><br /></td></tr>
<tr class="separator:ga1b844dcb0ed53494ee47d19303e8fdee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad77f2583a29a5df31c54ed67a95fc893"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad77f2583a29a5df31c54ed67a95fc893">XSDPS_SDMA_SYS_ADDR_LO_OFFSET</a>&#160;&#160;&#160;<a class="el" href="group__sdps__v2__5.html#ga1b844dcb0ed53494ee47d19303e8fdee">XSDPS_SDMA_SYS_ADDR_OFFSET</a></td></tr>
<tr class="memdesc:gad77f2583a29a5df31c54ed67a95fc893"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDMA System Address Low Register.  <a href="#gad77f2583a29a5df31c54ed67a95fc893">More...</a><br /></td></tr>
<tr class="separator:gad77f2583a29a5df31c54ed67a95fc893"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43426e7ab84285b4c72a206205564202"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga43426e7ab84285b4c72a206205564202">XSDPS_ARGMT2_LO_OFFSET</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:ga43426e7ab84285b4c72a206205564202"><td class="mdescLeft">&#160;</td><td class="mdescRight">Argument2 Low Register.  <a href="#ga43426e7ab84285b4c72a206205564202">More...</a><br /></td></tr>
<tr class="separator:ga43426e7ab84285b4c72a206205564202"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0e1c3a4ac4fc0c8aed692943dc44935"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad0e1c3a4ac4fc0c8aed692943dc44935">XSDPS_SDMA_SYS_ADDR_HI_OFFSET</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:gad0e1c3a4ac4fc0c8aed692943dc44935"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDMA System Address High Register.  <a href="#gad0e1c3a4ac4fc0c8aed692943dc44935">More...</a><br /></td></tr>
<tr class="separator:gad0e1c3a4ac4fc0c8aed692943dc44935"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab32ab9880169b81e5ab9d35524288607"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab32ab9880169b81e5ab9d35524288607">XSDPS_ARGMT2_HI_OFFSET</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:gab32ab9880169b81e5ab9d35524288607"><td class="mdescLeft">&#160;</td><td class="mdescRight">Argument2 High Register.  <a href="#gab32ab9880169b81e5ab9d35524288607">More...</a><br /></td></tr>
<tr class="separator:gab32ab9880169b81e5ab9d35524288607"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga056c8c37db130b3e8f553e38190e4578"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga056c8c37db130b3e8f553e38190e4578">XSDPS_BLK_SIZE_OFFSET</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga056c8c37db130b3e8f553e38190e4578"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Size Register.  <a href="#ga056c8c37db130b3e8f553e38190e4578">More...</a><br /></td></tr>
<tr class="separator:ga056c8c37db130b3e8f553e38190e4578"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0c324dd75ec228b0f7983f227202675"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gae0c324dd75ec228b0f7983f227202675">XSDPS_BLK_CNT_OFFSET</a>&#160;&#160;&#160;0x06U</td></tr>
<tr class="memdesc:gae0c324dd75ec228b0f7983f227202675"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Count Register.  <a href="#gae0c324dd75ec228b0f7983f227202675">More...</a><br /></td></tr>
<tr class="separator:gae0c324dd75ec228b0f7983f227202675"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0f629f596d2bcbdac2d2064dd834222e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0f629f596d2bcbdac2d2064dd834222e">XSDPS_ARGMT_OFFSET</a>&#160;&#160;&#160;0x08U</td></tr>
<tr class="memdesc:ga0f629f596d2bcbdac2d2064dd834222e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Argument Register.  <a href="#ga0f629f596d2bcbdac2d2064dd834222e">More...</a><br /></td></tr>
<tr class="separator:ga0f629f596d2bcbdac2d2064dd834222e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17c5f8c14aa76a9a827bf742f2ae4ac5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga17c5f8c14aa76a9a827bf742f2ae4ac5">XSDPS_ARGMT1_LO_OFFSET</a>&#160;&#160;&#160;<a class="el" href="group__sdps__v2__5.html#ga0f629f596d2bcbdac2d2064dd834222e">XSDPS_ARGMT_OFFSET</a></td></tr>
<tr class="memdesc:ga17c5f8c14aa76a9a827bf742f2ae4ac5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Argument1 Register.  <a href="#ga17c5f8c14aa76a9a827bf742f2ae4ac5">More...</a><br /></td></tr>
<tr class="separator:ga17c5f8c14aa76a9a827bf742f2ae4ac5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad4eb2208d36f4345d4020e03a75a8941"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad4eb2208d36f4345d4020e03a75a8941">XSDPS_ARGMT1_HI_OFFSET</a>&#160;&#160;&#160;0x0AU</td></tr>
<tr class="memdesc:gad4eb2208d36f4345d4020e03a75a8941"><td class="mdescLeft">&#160;</td><td class="mdescRight">Argument1 Register.  <a href="#gad4eb2208d36f4345d4020e03a75a8941">More...</a><br /></td></tr>
<tr class="separator:gad4eb2208d36f4345d4020e03a75a8941"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3bd38fbe9d25ae96d5ba2a284fe88a78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3bd38fbe9d25ae96d5ba2a284fe88a78">XSDPS_XFER_MODE_OFFSET</a>&#160;&#160;&#160;0x0CU</td></tr>
<tr class="memdesc:ga3bd38fbe9d25ae96d5ba2a284fe88a78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer Mode Register.  <a href="#ga3bd38fbe9d25ae96d5ba2a284fe88a78">More...</a><br /></td></tr>
<tr class="separator:ga3bd38fbe9d25ae96d5ba2a284fe88a78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9d156acd34095afa82ca28c2d9fd711"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac9d156acd34095afa82ca28c2d9fd711">XSDPS_CMD_OFFSET</a>&#160;&#160;&#160;0x0EU</td></tr>
<tr class="memdesc:gac9d156acd34095afa82ca28c2d9fd711"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Register.  <a href="#gac9d156acd34095afa82ca28c2d9fd711">More...</a><br /></td></tr>
<tr class="separator:gac9d156acd34095afa82ca28c2d9fd711"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga55b39729f5e5ec333e1729e49c0a3fa0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga55b39729f5e5ec333e1729e49c0a3fa0">XSDPS_RESP0_OFFSET</a>&#160;&#160;&#160;0x10U</td></tr>
<tr class="memdesc:ga55b39729f5e5ec333e1729e49c0a3fa0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response0 Register.  <a href="#ga55b39729f5e5ec333e1729e49c0a3fa0">More...</a><br /></td></tr>
<tr class="separator:ga55b39729f5e5ec333e1729e49c0a3fa0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ef21ca256af8f6995a821455faaa8e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga4ef21ca256af8f6995a821455faaa8e1">XSDPS_RESP1_OFFSET</a>&#160;&#160;&#160;0x14U</td></tr>
<tr class="memdesc:ga4ef21ca256af8f6995a821455faaa8e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response1 Register.  <a href="#ga4ef21ca256af8f6995a821455faaa8e1">More...</a><br /></td></tr>
<tr class="separator:ga4ef21ca256af8f6995a821455faaa8e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabe4ecffa571fb726055106837a2c6b15"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gabe4ecffa571fb726055106837a2c6b15">XSDPS_RESP2_OFFSET</a>&#160;&#160;&#160;0x18U</td></tr>
<tr class="memdesc:gabe4ecffa571fb726055106837a2c6b15"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response2 Register.  <a href="#gabe4ecffa571fb726055106837a2c6b15">More...</a><br /></td></tr>
<tr class="separator:gabe4ecffa571fb726055106837a2c6b15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab17cd4546023e6afde6c96141aa35cd6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab17cd4546023e6afde6c96141aa35cd6">XSDPS_RESP3_OFFSET</a>&#160;&#160;&#160;0x1CU</td></tr>
<tr class="memdesc:gab17cd4546023e6afde6c96141aa35cd6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response3 Register.  <a href="#gab17cd4546023e6afde6c96141aa35cd6">More...</a><br /></td></tr>
<tr class="separator:gab17cd4546023e6afde6c96141aa35cd6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab55ec1197863796be4260591af2fcc13"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab55ec1197863796be4260591af2fcc13">XSDPS_BUF_DAT_PORT_OFFSET</a>&#160;&#160;&#160;0x20U</td></tr>
<tr class="memdesc:gab55ec1197863796be4260591af2fcc13"><td class="mdescLeft">&#160;</td><td class="mdescRight">Buffer Data Port.  <a href="#gab55ec1197863796be4260591af2fcc13">More...</a><br /></td></tr>
<tr class="separator:gab55ec1197863796be4260591af2fcc13"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac4498ffd6183ea9be4bee7d2f178d8d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac4498ffd6183ea9be4bee7d2f178d8d0">XSDPS_PRES_STATE_OFFSET</a>&#160;&#160;&#160;0x24U</td></tr>
<tr class="memdesc:gac4498ffd6183ea9be4bee7d2f178d8d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Present State.  <a href="#gac4498ffd6183ea9be4bee7d2f178d8d0">More...</a><br /></td></tr>
<tr class="separator:gac4498ffd6183ea9be4bee7d2f178d8d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga69689aa6e0a5e28196b28c882a9236ae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga69689aa6e0a5e28196b28c882a9236ae">XSDPS_HOST_CTRL1_OFFSET</a>&#160;&#160;&#160;0x28U</td></tr>
<tr class="memdesc:ga69689aa6e0a5e28196b28c882a9236ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">Host Control 1.  <a href="#ga69689aa6e0a5e28196b28c882a9236ae">More...</a><br /></td></tr>
<tr class="separator:ga69689aa6e0a5e28196b28c882a9236ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga380e8cce3edea7db613b20edb3d51646"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga380e8cce3edea7db613b20edb3d51646">XSDPS_POWER_CTRL_OFFSET</a>&#160;&#160;&#160;0x29U</td></tr>
<tr class="memdesc:ga380e8cce3edea7db613b20edb3d51646"><td class="mdescLeft">&#160;</td><td class="mdescRight">Power Control.  <a href="#ga380e8cce3edea7db613b20edb3d51646">More...</a><br /></td></tr>
<tr class="separator:ga380e8cce3edea7db613b20edb3d51646"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga647487649c8822942fb3c84404780047"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga647487649c8822942fb3c84404780047">XSDPS_BLK_GAP_CTRL_OFFSET</a>&#160;&#160;&#160;0x2AU</td></tr>
<tr class="memdesc:ga647487649c8822942fb3c84404780047"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Control.  <a href="#ga647487649c8822942fb3c84404780047">More...</a><br /></td></tr>
<tr class="separator:ga647487649c8822942fb3c84404780047"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9ae6a5e649bcb6a25e7f96c37c37947"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac9ae6a5e649bcb6a25e7f96c37c37947">XSDPS_WAKE_UP_CTRL_OFFSET</a>&#160;&#160;&#160;0x2BU</td></tr>
<tr class="memdesc:gac9ae6a5e649bcb6a25e7f96c37c37947"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wake Up Control.  <a href="#gac9ae6a5e649bcb6a25e7f96c37c37947">More...</a><br /></td></tr>
<tr class="separator:gac9ae6a5e649bcb6a25e7f96c37c37947"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6386e0e4144576279df5f50d2e38625a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6386e0e4144576279df5f50d2e38625a">XSDPS_CLK_CTRL_OFFSET</a>&#160;&#160;&#160;0x2CU</td></tr>
<tr class="memdesc:ga6386e0e4144576279df5f50d2e38625a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock Control.  <a href="#ga6386e0e4144576279df5f50d2e38625a">More...</a><br /></td></tr>
<tr class="separator:ga6386e0e4144576279df5f50d2e38625a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga07b5d7d7fd452540c9a5a2f531e0f82d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga07b5d7d7fd452540c9a5a2f531e0f82d">XSDPS_TIMEOUT_CTRL_OFFSET</a>&#160;&#160;&#160;0x2EU</td></tr>
<tr class="memdesc:ga07b5d7d7fd452540c9a5a2f531e0f82d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timeout Control.  <a href="#ga07b5d7d7fd452540c9a5a2f531e0f82d">More...</a><br /></td></tr>
<tr class="separator:ga07b5d7d7fd452540c9a5a2f531e0f82d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad4a22634c50518cb7a595ebbe3ef6efa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad4a22634c50518cb7a595ebbe3ef6efa">XSDPS_SW_RST_OFFSET</a>&#160;&#160;&#160;0x2FU</td></tr>
<tr class="memdesc:gad4a22634c50518cb7a595ebbe3ef6efa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software Reset.  <a href="#gad4a22634c50518cb7a595ebbe3ef6efa">More...</a><br /></td></tr>
<tr class="separator:gad4a22634c50518cb7a595ebbe3ef6efa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2aa0027ce006eb71c2a954f66643ab54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga2aa0027ce006eb71c2a954f66643ab54">XSDPS_NORM_INTR_STS_OFFSET</a>&#160;&#160;&#160;0x30U</td></tr>
<tr class="memdesc:ga2aa0027ce006eb71c2a954f66643ab54"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal Interrupt Status Register.  <a href="#ga2aa0027ce006eb71c2a954f66643ab54">More...</a><br /></td></tr>
<tr class="separator:ga2aa0027ce006eb71c2a954f66643ab54"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21efb57620515a9d11db602b1122ab87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga21efb57620515a9d11db602b1122ab87">XSDPS_ERR_INTR_STS_OFFSET</a>&#160;&#160;&#160;0x32U</td></tr>
<tr class="memdesc:ga21efb57620515a9d11db602b1122ab87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error Interrupt Status Register.  <a href="#ga21efb57620515a9d11db602b1122ab87">More...</a><br /></td></tr>
<tr class="separator:ga21efb57620515a9d11db602b1122ab87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga141e3bd95516c55db282fd0a16a290c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga141e3bd95516c55db282fd0a16a290c4">XSDPS_NORM_INTR_STS_EN_OFFSET</a>&#160;&#160;&#160;0x34U</td></tr>
<tr class="memdesc:ga141e3bd95516c55db282fd0a16a290c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal Interrupt Status Enable Register.  <a href="#ga141e3bd95516c55db282fd0a16a290c4">More...</a><br /></td></tr>
<tr class="separator:ga141e3bd95516c55db282fd0a16a290c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ee4f57e03d125d31fb701b7b3540b47"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga7ee4f57e03d125d31fb701b7b3540b47">XSDPS_ERR_INTR_STS_EN_OFFSET</a>&#160;&#160;&#160;0x36U</td></tr>
<tr class="memdesc:ga7ee4f57e03d125d31fb701b7b3540b47"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error Interrupt Status Enable Register.  <a href="#ga7ee4f57e03d125d31fb701b7b3540b47">More...</a><br /></td></tr>
<tr class="separator:ga7ee4f57e03d125d31fb701b7b3540b47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad8416be998260fa01debc6037f93ee80"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad8416be998260fa01debc6037f93ee80">XSDPS_NORM_INTR_SIG_EN_OFFSET</a>&#160;&#160;&#160;0x38U</td></tr>
<tr class="memdesc:gad8416be998260fa01debc6037f93ee80"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal Interrupt Signal Enable Register.  <a href="#gad8416be998260fa01debc6037f93ee80">More...</a><br /></td></tr>
<tr class="separator:gad8416be998260fa01debc6037f93ee80"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga92f6b9bc19b145ac7c2562115559d5dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga92f6b9bc19b145ac7c2562115559d5dc">XSDPS_ERR_INTR_SIG_EN_OFFSET</a>&#160;&#160;&#160;0x3AU</td></tr>
<tr class="memdesc:ga92f6b9bc19b145ac7c2562115559d5dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error Interrupt Signal Enable Register.  <a href="#ga92f6b9bc19b145ac7c2562115559d5dc">More...</a><br /></td></tr>
<tr class="separator:ga92f6b9bc19b145ac7c2562115559d5dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3838e63e18b0a9e4e629ed93b38ac92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac3838e63e18b0a9e4e629ed93b38ac92">XSDPS_AUTO_CMD12_ERR_STS_OFFSET</a>&#160;&#160;&#160;0x3CU</td></tr>
<tr class="memdesc:gac3838e63e18b0a9e4e629ed93b38ac92"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD12 Error Status Register.  <a href="#gac3838e63e18b0a9e4e629ed93b38ac92">More...</a><br /></td></tr>
<tr class="separator:gac3838e63e18b0a9e4e629ed93b38ac92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga487b97e471f359589c38ae2ecba72b0c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga487b97e471f359589c38ae2ecba72b0c">XSDPS_HOST_CTRL2_OFFSET</a>&#160;&#160;&#160;0x3EU</td></tr>
<tr class="memdesc:ga487b97e471f359589c38ae2ecba72b0c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Host Control2 Register.  <a href="#ga487b97e471f359589c38ae2ecba72b0c">More...</a><br /></td></tr>
<tr class="separator:ga487b97e471f359589c38ae2ecba72b0c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga112509649c3e0a85a48d471395f3ce6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga112509649c3e0a85a48d471395f3ce6c">XSDPS_CAPS_OFFSET</a>&#160;&#160;&#160;0x40U</td></tr>
<tr class="memdesc:ga112509649c3e0a85a48d471395f3ce6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Capabilities Register.  <a href="#ga112509649c3e0a85a48d471395f3ce6c">More...</a><br /></td></tr>
<tr class="separator:ga112509649c3e0a85a48d471395f3ce6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga20cfdec07d3d07d523fd62d67339ec0f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga20cfdec07d3d07d523fd62d67339ec0f">XSDPS_CAPS_EXT_OFFSET</a>&#160;&#160;&#160;0x44U</td></tr>
<tr class="memdesc:ga20cfdec07d3d07d523fd62d67339ec0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Capabilities Extended.  <a href="#ga20cfdec07d3d07d523fd62d67339ec0f">More...</a><br /></td></tr>
<tr class="separator:ga20cfdec07d3d07d523fd62d67339ec0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac0e5b893a03b99150d02a98f504917fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac0e5b893a03b99150d02a98f504917fe">XSDPS_MAX_CURR_CAPS_OFFSET</a>&#160;&#160;&#160;0x48U</td></tr>
<tr class="memdesc:gac0e5b893a03b99150d02a98f504917fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Current Capabilities Register.  <a href="#gac0e5b893a03b99150d02a98f504917fe">More...</a><br /></td></tr>
<tr class="separator:gac0e5b893a03b99150d02a98f504917fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc0ea43ff8514a49657c11921e255efa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gafc0ea43ff8514a49657c11921e255efa">XSDPS_MAX_CURR_CAPS_EXT_OFFSET</a>&#160;&#160;&#160;0x4CU</td></tr>
<tr class="memdesc:gafc0ea43ff8514a49657c11921e255efa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Current Capabilities Ext Register.  <a href="#gafc0ea43ff8514a49657c11921e255efa">More...</a><br /></td></tr>
<tr class="separator:gafc0ea43ff8514a49657c11921e255efa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab01df91285e39e58676fdf2ee0e6d8dd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab01df91285e39e58676fdf2ee0e6d8dd">XSDPS_FE_ERR_INT_STS_OFFSET</a>&#160;&#160;&#160;0x52U</td></tr>
<tr class="memdesc:gab01df91285e39e58676fdf2ee0e6d8dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Force Event for Error Interrupt Status.  <a href="#gab01df91285e39e58676fdf2ee0e6d8dd">More...</a><br /></td></tr>
<tr class="separator:gab01df91285e39e58676fdf2ee0e6d8dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd5768e81d9cac3561272bfa74ed4085"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gabd5768e81d9cac3561272bfa74ed4085">XSDPS_FE_AUTO_CMD12_EIS_OFFSET</a>&#160;&#160;&#160;0x50U</td></tr>
<tr class="memdesc:gabd5768e81d9cac3561272bfa74ed4085"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CM12 Error Interrupt Status Register.  <a href="#gabd5768e81d9cac3561272bfa74ed4085">More...</a><br /></td></tr>
<tr class="separator:gabd5768e81d9cac3561272bfa74ed4085"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8596f558d715af3bce27d0b872228973"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga8596f558d715af3bce27d0b872228973">XSDPS_ADMA_ERR_STS_OFFSET</a>&#160;&#160;&#160;0x54U</td></tr>
<tr class="memdesc:ga8596f558d715af3bce27d0b872228973"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Error Status Register.  <a href="#ga8596f558d715af3bce27d0b872228973">More...</a><br /></td></tr>
<tr class="separator:ga8596f558d715af3bce27d0b872228973"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae96828d548d3bdb30ed057eb0bdc8be1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gae96828d548d3bdb30ed057eb0bdc8be1">XSDPS_ADMA_SAR_OFFSET</a>&#160;&#160;&#160;0x58U</td></tr>
<tr class="memdesc:gae96828d548d3bdb30ed057eb0bdc8be1"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA System Address Register.  <a href="#gae96828d548d3bdb30ed057eb0bdc8be1">More...</a><br /></td></tr>
<tr class="separator:gae96828d548d3bdb30ed057eb0bdc8be1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab775116938341d21b9796ffae03fdd10"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab775116938341d21b9796ffae03fdd10">XSDPS_ADMA_SAR_EXT_OFFSET</a>&#160;&#160;&#160;0x5CU</td></tr>
<tr class="memdesc:gab775116938341d21b9796ffae03fdd10"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA System Address Extended Register.  <a href="#gab775116938341d21b9796ffae03fdd10">More...</a><br /></td></tr>
<tr class="separator:gab775116938341d21b9796ffae03fdd10"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga01c4bf3a64f6748aad4018ef932a7671"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga01c4bf3a64f6748aad4018ef932a7671">XSDPS_PRE_VAL_1_OFFSET</a>&#160;&#160;&#160;0x60U</td></tr>
<tr class="memdesc:ga01c4bf3a64f6748aad4018ef932a7671"><td class="mdescLeft">&#160;</td><td class="mdescRight">Preset Value Register.  <a href="#ga01c4bf3a64f6748aad4018ef932a7671">More...</a><br /></td></tr>
<tr class="separator:ga01c4bf3a64f6748aad4018ef932a7671"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f3ff3f7193c94d20372109e31c31dc0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga8f3ff3f7193c94d20372109e31c31dc0">XSDPS_PRE_VAL_2_OFFSET</a>&#160;&#160;&#160;0x64U</td></tr>
<tr class="memdesc:ga8f3ff3f7193c94d20372109e31c31dc0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Preset Value Register.  <a href="#ga8f3ff3f7193c94d20372109e31c31dc0">More...</a><br /></td></tr>
<tr class="separator:ga8f3ff3f7193c94d20372109e31c31dc0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13836352ecc3b8b09cbb480fe85cfb88"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga13836352ecc3b8b09cbb480fe85cfb88">XSDPS_PRE_VAL_3_OFFSET</a>&#160;&#160;&#160;0x68U</td></tr>
<tr class="memdesc:ga13836352ecc3b8b09cbb480fe85cfb88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Preset Value Register.  <a href="#ga13836352ecc3b8b09cbb480fe85cfb88">More...</a><br /></td></tr>
<tr class="separator:ga13836352ecc3b8b09cbb480fe85cfb88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga31026ac0c37e10723c72bc56bcf4cf62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga31026ac0c37e10723c72bc56bcf4cf62">XSDPS_PRE_VAL_4_OFFSET</a>&#160;&#160;&#160;0x6CU</td></tr>
<tr class="memdesc:ga31026ac0c37e10723c72bc56bcf4cf62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Preset Value Register.  <a href="#ga31026ac0c37e10723c72bc56bcf4cf62">More...</a><br /></td></tr>
<tr class="separator:ga31026ac0c37e10723c72bc56bcf4cf62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36a776897478c7698016a45da34c34d6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga36a776897478c7698016a45da34c34d6">XSDPS_BOOT_TOUT_CTRL_OFFSET</a>&#160;&#160;&#160;0x70U</td></tr>
<tr class="memdesc:ga36a776897478c7698016a45da34c34d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Boot timeout control register.  <a href="#ga36a776897478c7698016a45da34c34d6">More...</a><br /></td></tr>
<tr class="separator:ga36a776897478c7698016a45da34c34d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe47ca8a96807b4fb22f09ee18f0c19d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gafe47ca8a96807b4fb22f09ee18f0c19d">XSDPS_SHARED_BUS_CTRL_OFFSET</a>&#160;&#160;&#160;0xE0U</td></tr>
<tr class="memdesc:gafe47ca8a96807b4fb22f09ee18f0c19d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shared Bus Control Register.  <a href="#gafe47ca8a96807b4fb22f09ee18f0c19d">More...</a><br /></td></tr>
<tr class="separator:gafe47ca8a96807b4fb22f09ee18f0c19d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga536885cdab156a2e09a9ace5c8da10ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga536885cdab156a2e09a9ace5c8da10ab">XSDPS_SLOT_INTR_STS_OFFSET</a>&#160;&#160;&#160;0xFCU</td></tr>
<tr class="memdesc:ga536885cdab156a2e09a9ace5c8da10ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Slot Interrupt Status Register.  <a href="#ga536885cdab156a2e09a9ace5c8da10ab">More...</a><br /></td></tr>
<tr class="separator:ga536885cdab156a2e09a9ace5c8da10ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacc3553b03dddae404e91c08e9a6f6a1e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gacc3553b03dddae404e91c08e9a6f6a1e">XSDPS_HOST_CTRL_VER_OFFSET</a>&#160;&#160;&#160;0xFEU</td></tr>
<tr class="memdesc:gacc3553b03dddae404e91c08e9a6f6a1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Host Controller Version Register.  <a href="#gacc3553b03dddae404e91c08e9a6f6a1e">More...</a><br /></td></tr>
<tr class="separator:gacc3553b03dddae404e91c08e9a6f6a1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Control Register - Host control, Power control,</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp0dab33ac983afc351f52c0580767a8c7"></a>Block Gap control and Wakeup control</p>
<p>This register contains bits for various configuration options of the SD host controller. Read/Write apart from the reserved bits. </p>
</td></tr>
<tr class="memitem:ga5be4b7a09bc5b3703fcdcbc6e299981f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5be4b7a09bc5b3703fcdcbc6e299981f">XSDPS_HC_LED_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga5be4b7a09bc5b3703fcdcbc6e299981f"><td class="mdescLeft">&#160;</td><td class="mdescRight">LED Control.  <a href="#ga5be4b7a09bc5b3703fcdcbc6e299981f">More...</a><br /></td></tr>
<tr class="separator:ga5be4b7a09bc5b3703fcdcbc6e299981f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga259e62cdf5c866dfcc1607810a14e293"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga259e62cdf5c866dfcc1607810a14e293">XSDPS_HC_WIDTH_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga259e62cdf5c866dfcc1607810a14e293"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus width.  <a href="#ga259e62cdf5c866dfcc1607810a14e293">More...</a><br /></td></tr>
<tr class="separator:ga259e62cdf5c866dfcc1607810a14e293"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga95fda956049124bfec607be4ab32f264"><td class="memItemLeft" align="right" valign="top"><a id="ga95fda956049124bfec607be4ab32f264"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_HC_BUS_WIDTH_4</b>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="separator:ga95fda956049124bfec607be4ab32f264"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa07ab5096cbcff0ea531cd87dad81b99"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa07ab5096cbcff0ea531cd87dad81b99">XSDPS_HC_SPEED_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:gaa07ab5096cbcff0ea531cd87dad81b99"><td class="mdescLeft">&#160;</td><td class="mdescRight">High Speed.  <a href="#gaa07ab5096cbcff0ea531cd87dad81b99">More...</a><br /></td></tr>
<tr class="separator:gaa07ab5096cbcff0ea531cd87dad81b99"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga572fb87d6aa81b262334d7a81b75d944"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga572fb87d6aa81b262334d7a81b75d944">XSDPS_HC_DMA_MASK</a>&#160;&#160;&#160;0x00000018U</td></tr>
<tr class="memdesc:ga572fb87d6aa81b262334d7a81b75d944"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Mode Select.  <a href="#ga572fb87d6aa81b262334d7a81b75d944">More...</a><br /></td></tr>
<tr class="separator:ga572fb87d6aa81b262334d7a81b75d944"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga127f193afe1341b5055f1cb46e5823f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga127f193afe1341b5055f1cb46e5823f5">XSDPS_HC_DMA_SDMA_MASK</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga127f193afe1341b5055f1cb46e5823f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDMA Mode.  <a href="#ga127f193afe1341b5055f1cb46e5823f5">More...</a><br /></td></tr>
<tr class="separator:ga127f193afe1341b5055f1cb46e5823f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd47fcd2436119baf84ad740068bc321"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gabd47fcd2436119baf84ad740068bc321">XSDPS_HC_DMA_ADMA1_MASK</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:gabd47fcd2436119baf84ad740068bc321"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA1 Mode.  <a href="#gabd47fcd2436119baf84ad740068bc321">More...</a><br /></td></tr>
<tr class="separator:gabd47fcd2436119baf84ad740068bc321"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaabcb7733a1802a8333d0dda8967787d9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaabcb7733a1802a8333d0dda8967787d9">XSDPS_HC_DMA_ADMA2_32_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:gaabcb7733a1802a8333d0dda8967787d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA2 Mode - 32 bit.  <a href="#gaabcb7733a1802a8333d0dda8967787d9">More...</a><br /></td></tr>
<tr class="separator:gaabcb7733a1802a8333d0dda8967787d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacab6623568de7b823a7921ca34137472"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gacab6623568de7b823a7921ca34137472">XSDPS_HC_DMA_ADMA2_64_MASK</a>&#160;&#160;&#160;0x00000018U</td></tr>
<tr class="memdesc:gacab6623568de7b823a7921ca34137472"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA2 Mode - 64 bit.  <a href="#gacab6623568de7b823a7921ca34137472">More...</a><br /></td></tr>
<tr class="separator:gacab6623568de7b823a7921ca34137472"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga053e5cfcf8ad9023810507a1ef2f15bf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga053e5cfcf8ad9023810507a1ef2f15bf">XSDPS_HC_EXT_BUS_WIDTH</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga053e5cfcf8ad9023810507a1ef2f15bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus width - 8 bit.  <a href="#ga053e5cfcf8ad9023810507a1ef2f15bf">More...</a><br /></td></tr>
<tr class="separator:ga053e5cfcf8ad9023810507a1ef2f15bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13211634fd4e0cc01a30fc4288724eb1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga13211634fd4e0cc01a30fc4288724eb1">XSDPS_HC_CARD_DET_TL_MASK</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga13211634fd4e0cc01a30fc4288724eb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card Detect Tst Lvl.  <a href="#ga13211634fd4e0cc01a30fc4288724eb1">More...</a><br /></td></tr>
<tr class="separator:ga13211634fd4e0cc01a30fc4288724eb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ea64b27d798c4cd1733ef26b65d98f2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga4ea64b27d798c4cd1733ef26b65d98f2">XSDPS_HC_CARD_DET_SD_MASK</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:ga4ea64b27d798c4cd1733ef26b65d98f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card Detect Sig Det.  <a href="#ga4ea64b27d798c4cd1733ef26b65d98f2">More...</a><br /></td></tr>
<tr class="separator:ga4ea64b27d798c4cd1733ef26b65d98f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1c329941406ddae454526e1711bd5aa3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1c329941406ddae454526e1711bd5aa3">XSDPS_PC_BUS_PWR_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga1c329941406ddae454526e1711bd5aa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Power Control.  <a href="#ga1c329941406ddae454526e1711bd5aa3">More...</a><br /></td></tr>
<tr class="separator:ga1c329941406ddae454526e1711bd5aa3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73a0ec34c6a3e9b5b731ad1b52a2be4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga73a0ec34c6a3e9b5b731ad1b52a2be4e">XSDPS_PC_BUS_VSEL_MASK</a>&#160;&#160;&#160;0x0000000EU</td></tr>
<tr class="memdesc:ga73a0ec34c6a3e9b5b731ad1b52a2be4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Voltage Select.  <a href="#ga73a0ec34c6a3e9b5b731ad1b52a2be4e">More...</a><br /></td></tr>
<tr class="separator:ga73a0ec34c6a3e9b5b731ad1b52a2be4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5dcd35047822e69db6ebaa895160954"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa5dcd35047822e69db6ebaa895160954">XSDPS_PC_BUS_VSEL_3V3_MASK</a>&#160;&#160;&#160;0x0000000EU</td></tr>
<tr class="memdesc:gaa5dcd35047822e69db6ebaa895160954"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Voltage 3.3V.  <a href="#gaa5dcd35047822e69db6ebaa895160954">More...</a><br /></td></tr>
<tr class="separator:gaa5dcd35047822e69db6ebaa895160954"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf92a9b2a3faa4002072359e7694541a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaf92a9b2a3faa4002072359e7694541a4">XSDPS_PC_BUS_VSEL_3V0_MASK</a>&#160;&#160;&#160;0x0000000CU</td></tr>
<tr class="memdesc:gaf92a9b2a3faa4002072359e7694541a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Voltage 3.0V.  <a href="#gaf92a9b2a3faa4002072359e7694541a4">More...</a><br /></td></tr>
<tr class="separator:gaf92a9b2a3faa4002072359e7694541a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03c307e41770161bb6777aba8cfc79ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga03c307e41770161bb6777aba8cfc79ea">XSDPS_PC_BUS_VSEL_1V8_MASK</a>&#160;&#160;&#160;0x0000000AU</td></tr>
<tr class="memdesc:ga03c307e41770161bb6777aba8cfc79ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Voltage 1.8V.  <a href="#ga03c307e41770161bb6777aba8cfc79ea">More...</a><br /></td></tr>
<tr class="separator:ga03c307e41770161bb6777aba8cfc79ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6c09ea0e09500857567b1c13dfa6ecaf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6c09ea0e09500857567b1c13dfa6ecaf">XSDPS_PC_EMMC_HW_RST_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga6c09ea0e09500857567b1c13dfa6ecaf"><td class="mdescLeft">&#160;</td><td class="mdescRight">HW reset for eMMC.  <a href="#ga6c09ea0e09500857567b1c13dfa6ecaf">More...</a><br /></td></tr>
<tr class="separator:ga6c09ea0e09500857567b1c13dfa6ecaf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gababf16747192f5f824455c7cf80e902c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gababf16747192f5f824455c7cf80e902c">XSDPS_BGC_STP_REQ_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gababf16747192f5f824455c7cf80e902c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Stop Req.  <a href="#gababf16747192f5f824455c7cf80e902c">More...</a><br /></td></tr>
<tr class="separator:gababf16747192f5f824455c7cf80e902c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4a892bcb6ad14e6b7c462bf6f05210e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga4a892bcb6ad14e6b7c462bf6f05210e1">XSDPS_BGC_CNT_REQ_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga4a892bcb6ad14e6b7c462bf6f05210e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Cont Req.  <a href="#ga4a892bcb6ad14e6b7c462bf6f05210e1">More...</a><br /></td></tr>
<tr class="separator:ga4a892bcb6ad14e6b7c462bf6f05210e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9b662718ec0b7259d9322d4b02eab4f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab9b662718ec0b7259d9322d4b02eab4f">XSDPS_BGC_RWC_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:gab9b662718ec0b7259d9322d4b02eab4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Rd Wait.  <a href="#gab9b662718ec0b7259d9322d4b02eab4f">More...</a><br /></td></tr>
<tr class="separator:gab9b662718ec0b7259d9322d4b02eab4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27992b5760be2e85951e69f64c988834"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga27992b5760be2e85951e69f64c988834">XSDPS_BGC_INTR_MASK</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga27992b5760be2e85951e69f64c988834"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Intr.  <a href="#ga27992b5760be2e85951e69f64c988834">More...</a><br /></td></tr>
<tr class="separator:ga27992b5760be2e85951e69f64c988834"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e4b1b1e81e201f881acbc87899fd756"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1e4b1b1e81e201f881acbc87899fd756">XSDPS_BGC_SPI_MODE_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga1e4b1b1e81e201f881acbc87899fd756"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap SPI Mode.  <a href="#ga1e4b1b1e81e201f881acbc87899fd756">More...</a><br /></td></tr>
<tr class="separator:ga1e4b1b1e81e201f881acbc87899fd756"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabfd011a8a9c0c2473781fe53f9eda19e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gabfd011a8a9c0c2473781fe53f9eda19e">XSDPS_BGC_BOOT_EN_MASK</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:gabfd011a8a9c0c2473781fe53f9eda19e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Boot Enb.  <a href="#gabfd011a8a9c0c2473781fe53f9eda19e">More...</a><br /></td></tr>
<tr class="separator:gabfd011a8a9c0c2473781fe53f9eda19e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga311eef2831397adc78fd07e691aee110"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga311eef2831397adc78fd07e691aee110">XSDPS_BGC_ALT_BOOT_EN_MASK</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga311eef2831397adc78fd07e691aee110"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Alt BootEn.  <a href="#ga311eef2831397adc78fd07e691aee110">More...</a><br /></td></tr>
<tr class="separator:ga311eef2831397adc78fd07e691aee110"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a82c37d5d1777917c976a760d5d9c96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0a82c37d5d1777917c976a760d5d9c96">XSDPS_BGC_BOOT_ACK_MASK</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:ga0a82c37d5d1777917c976a760d5d9c96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Boot Ack.  <a href="#ga0a82c37d5d1777917c976a760d5d9c96">More...</a><br /></td></tr>
<tr class="separator:ga0a82c37d5d1777917c976a760d5d9c96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac45a8661339d777e1f802e38dcb782bf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac45a8661339d777e1f802e38dcb782bf">XSDPS_WC_WUP_ON_INTR_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gac45a8661339d777e1f802e38dcb782bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wakeup Card Intr.  <a href="#gac45a8661339d777e1f802e38dcb782bf">More...</a><br /></td></tr>
<tr class="separator:gac45a8661339d777e1f802e38dcb782bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga772a7f8b8878621f10f9edcdcf45fe09"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga772a7f8b8878621f10f9edcdcf45fe09">XSDPS_WC_WUP_ON_INSRT_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga772a7f8b8878621f10f9edcdcf45fe09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wakeup Card Insert.  <a href="#ga772a7f8b8878621f10f9edcdcf45fe09">More...</a><br /></td></tr>
<tr class="separator:ga772a7f8b8878621f10f9edcdcf45fe09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabee6427e5b18670be54a11474e9db014"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gabee6427e5b18670be54a11474e9db014">XSDPS_WC_WUP_ON_REM_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:gabee6427e5b18670be54a11474e9db014"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wakeup Card Removal.  <a href="#gabee6427e5b18670be54a11474e9db014">More...</a><br /></td></tr>
<tr class="separator:gabee6427e5b18670be54a11474e9db014"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Control Register - Clock control, Timeout control &amp; Software reset</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp3d698facb16f716aab3ee2cc1e2f79f8"></a>This register contains bits for configuration options of clock, timeout and software reset.</p>
<p>Read/Write except for Inter_Clock_Stable bit (read only) and reserved bits. </p>
</td></tr>
<tr class="memitem:gadd5e3438bf21c9d59622101b3e443f7e"><td class="memItemLeft" align="right" valign="top"><a id="gadd5e3438bf21c9d59622101b3e443f7e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_INT_CLK_EN_MASK</b>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="separator:gadd5e3438bf21c9d59622101b3e443f7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8189fce099d0a066fc5bf23fc5ec3c74"><td class="memItemLeft" align="right" valign="top"><a id="ga8189fce099d0a066fc5bf23fc5ec3c74"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_INT_CLK_STABLE_MASK</b>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="separator:ga8189fce099d0a066fc5bf23fc5ec3c74"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae36deefcd09208fb897e83b53cb9fea8"><td class="memItemLeft" align="right" valign="top"><a id="gae36deefcd09208fb897e83b53cb9fea8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SD_CLK_EN_MASK</b>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="separator:gae36deefcd09208fb897e83b53cb9fea8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae827dd5e0cfc85382d36b64a951321aa"><td class="memItemLeft" align="right" valign="top"><a id="gae827dd5e0cfc85382d36b64a951321aa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SD_CLK_GEN_SEL_MASK</b>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="separator:gae827dd5e0cfc85382d36b64a951321aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a82229ff0d30d4a7db3117f5f68599c"><td class="memItemLeft" align="right" valign="top"><a id="ga9a82229ff0d30d4a7db3117f5f68599c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_SEL_EXT_MASK</b>&#160;&#160;&#160;0x000000C0U</td></tr>
<tr class="separator:ga9a82229ff0d30d4a7db3117f5f68599c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga237a2472be22b1a9e205048e014eddb8"><td class="memItemLeft" align="right" valign="top"><a id="ga237a2472be22b1a9e205048e014eddb8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_SEL_MASK</b>&#160;&#160;&#160;0x0000FF00U</td></tr>
<tr class="separator:ga237a2472be22b1a9e205048e014eddb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacfca6a57c4516d55569f0e0b3e441d32"><td class="memItemLeft" align="right" valign="top"><a id="gacfca6a57c4516d55569f0e0b3e441d32"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D256_MASK</b>&#160;&#160;&#160;0x00008000U</td></tr>
<tr class="separator:gacfca6a57c4516d55569f0e0b3e441d32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32d5135f990033bad6ca677d6f153927"><td class="memItemLeft" align="right" valign="top"><a id="ga32d5135f990033bad6ca677d6f153927"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D128_MASK</b>&#160;&#160;&#160;0x00004000U</td></tr>
<tr class="separator:ga32d5135f990033bad6ca677d6f153927"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2d5288ed2cb785101ae4216a5c90804e"><td class="memItemLeft" align="right" valign="top"><a id="ga2d5288ed2cb785101ae4216a5c90804e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D64_MASK</b>&#160;&#160;&#160;0x00002000U</td></tr>
<tr class="separator:ga2d5288ed2cb785101ae4216a5c90804e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadab08294e423d62389a536e9cb3d311d"><td class="memItemLeft" align="right" valign="top"><a id="gadab08294e423d62389a536e9cb3d311d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D32_MASK</b>&#160;&#160;&#160;0x00001000U</td></tr>
<tr class="separator:gadab08294e423d62389a536e9cb3d311d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c6bed01d7e6bc950beb65ebfdf357a0"><td class="memItemLeft" align="right" valign="top"><a id="ga9c6bed01d7e6bc950beb65ebfdf357a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D16_MASK</b>&#160;&#160;&#160;0x00000800U</td></tr>
<tr class="separator:ga9c6bed01d7e6bc950beb65ebfdf357a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae02899b01b8abf6b7163a1c6e7851a67"><td class="memItemLeft" align="right" valign="top"><a id="gae02899b01b8abf6b7163a1c6e7851a67"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D8_MASK</b>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="separator:gae02899b01b8abf6b7163a1c6e7851a67"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd16fb2ac4c9d79c359d8063cd22370b"><td class="memItemLeft" align="right" valign="top"><a id="gafd16fb2ac4c9d79c359d8063cd22370b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D4_MASK</b>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="separator:gafd16fb2ac4c9d79c359d8063cd22370b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d6e55f4537d36ddb0aa0f12efad4186"><td class="memItemLeft" align="right" valign="top"><a id="ga8d6e55f4537d36ddb0aa0f12efad4186"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_D2_MASK</b>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="separator:ga8d6e55f4537d36ddb0aa0f12efad4186"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf184d8b7a7035fc623e54f30933d5734"><td class="memItemLeft" align="right" valign="top"><a id="gaf184d8b7a7035fc623e54f30933d5734"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_SDCLK_FREQ_BASE_MASK</b>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="separator:gaf184d8b7a7035fc623e54f30933d5734"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga968b6798470f01760279df4ec3cb8b00"><td class="memItemLeft" align="right" valign="top"><a id="ga968b6798470f01760279df4ec3cb8b00"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_MAX_DIV_CNT</b>&#160;&#160;&#160;256U</td></tr>
<tr class="separator:ga968b6798470f01760279df4ec3cb8b00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa9e922ec9fb5ff0b4f1dd91dd89f370"><td class="memItemLeft" align="right" valign="top"><a id="gaaa9e922ec9fb5ff0b4f1dd91dd89f370"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_EXT_MAX_DIV_CNT</b>&#160;&#160;&#160;2046U</td></tr>
<tr class="separator:gaaa9e922ec9fb5ff0b4f1dd91dd89f370"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga11f6eba3421db06b4caf6c0126c8b331"><td class="memItemLeft" align="right" valign="top"><a id="ga11f6eba3421db06b4caf6c0126c8b331"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_EXT_DIV_SHIFT</b>&#160;&#160;&#160;6U</td></tr>
<tr class="separator:ga11f6eba3421db06b4caf6c0126c8b331"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf53b7bb4db729964cfdf8ffa1f43a4e2"><td class="memItemLeft" align="right" valign="top"><a id="gaf53b7bb4db729964cfdf8ffa1f43a4e2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_TC_CNTR_VAL_MASK</b>&#160;&#160;&#160;0x0000000FU</td></tr>
<tr class="separator:gaf53b7bb4db729964cfdf8ffa1f43a4e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3992e0e56ea14743b08d7dc8beb32174"><td class="memItemLeft" align="right" valign="top"><a id="ga3992e0e56ea14743b08d7dc8beb32174"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_SWRST_ALL_MASK</b>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="separator:ga3992e0e56ea14743b08d7dc8beb32174"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86fd6a781f4ec757b2305202c6ac0f7a"><td class="memItemLeft" align="right" valign="top"><a id="ga86fd6a781f4ec757b2305202c6ac0f7a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_SWRST_CMD_LINE_MASK</b>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="separator:ga86fd6a781f4ec757b2305202c6ac0f7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0e1608fe9961aa13733d393b09c5441d"><td class="memItemLeft" align="right" valign="top"><a id="ga0e1608fe9961aa13733d393b09c5441d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_SWRST_DAT_LINE_MASK</b>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="separator:ga0e1608fe9961aa13733d393b09c5441d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5dd91346b7f0b40018b44dd31350985c"><td class="memItemLeft" align="right" valign="top"><a id="ga5dd91346b7f0b40018b44dd31350985c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_MAX_NUM_OF_DIV</b>&#160;&#160;&#160;9U</td></tr>
<tr class="separator:ga5dd91346b7f0b40018b44dd31350985c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b9762b932a2f23f83ce604e3ee07dd4"><td class="memItemLeft" align="right" valign="top"><a id="ga9b9762b932a2f23f83ce604e3ee07dd4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_CC_DIV_SHIFT</b>&#160;&#160;&#160;8U</td></tr>
<tr class="separator:ga9b9762b932a2f23f83ce604e3ee07dd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
SD Interrupt Registers</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpe9d56e5cd7f490e136273a7d81c441b5"></a><b> Normal and Error Interrupt Status Register </b> This register shows the normal and error interrupt status.</p>
<p>Status enable register affects reads of this register. If Signal enable register is set and the corresponding status bit is set, interrupt is generated. Write to clear except Error_interrupt and Card_Interrupt bits - Read only</p>
<p><b> Normal and Error Interrupt Status Enable Register </b> Setting this register bits enables Interrupt status. Read/Write except Fixed_to_0 bit (Read only)</p>
<p><b> Normal and Error Interrupt Signal Enable Register </b> This register is used to select which interrupt status is indicated to the Host System as the interrupt. Read/Write except Fixed_to_0 bit (Read only)</p>
<p>All three registers have same bit definitions </p>
</td></tr>
<tr class="memitem:ga96cfd1bf0599a109711447c1839ee6a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga96cfd1bf0599a109711447c1839ee6a5">XSDPS_INTR_CC_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga96cfd1bf0599a109711447c1839ee6a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Complete.  <a href="#ga96cfd1bf0599a109711447c1839ee6a5">More...</a><br /></td></tr>
<tr class="separator:ga96cfd1bf0599a109711447c1839ee6a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4840b3795e951ab39a111003464f2334"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga4840b3795e951ab39a111003464f2334">XSDPS_INTR_TC_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga4840b3795e951ab39a111003464f2334"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer Complete.  <a href="#ga4840b3795e951ab39a111003464f2334">More...</a><br /></td></tr>
<tr class="separator:ga4840b3795e951ab39a111003464f2334"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27059a9a3c7fd408982210e6d987da73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga27059a9a3c7fd408982210e6d987da73">XSDPS_INTR_BGE_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga27059a9a3c7fd408982210e6d987da73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Gap Event.  <a href="#ga27059a9a3c7fd408982210e6d987da73">More...</a><br /></td></tr>
<tr class="separator:ga27059a9a3c7fd408982210e6d987da73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad960f4977815a61110da4820f4385a31"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad960f4977815a61110da4820f4385a31">XSDPS_INTR_DMA_MASK</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:gad960f4977815a61110da4820f4385a31"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Interrupt.  <a href="#gad960f4977815a61110da4820f4385a31">More...</a><br /></td></tr>
<tr class="separator:gad960f4977815a61110da4820f4385a31"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d672782729e8b0c229f4f01b248048c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5d672782729e8b0c229f4f01b248048c">XSDPS_INTR_BWR_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga5d672782729e8b0c229f4f01b248048c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Buffer Write Ready.  <a href="#ga5d672782729e8b0c229f4f01b248048c">More...</a><br /></td></tr>
<tr class="separator:ga5d672782729e8b0c229f4f01b248048c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7bbc8becd90cb01642edd92506a1248b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga7bbc8becd90cb01642edd92506a1248b">XSDPS_INTR_BRR_MASK</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga7bbc8becd90cb01642edd92506a1248b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Buffer Read Ready.  <a href="#ga7bbc8becd90cb01642edd92506a1248b">More...</a><br /></td></tr>
<tr class="separator:ga7bbc8becd90cb01642edd92506a1248b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7c2b759ff1ab9952510b9b5cf7aff96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa7c2b759ff1ab9952510b9b5cf7aff96">XSDPS_INTR_CARD_INSRT_MASK</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:gaa7c2b759ff1ab9952510b9b5cf7aff96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card Insert.  <a href="#gaa7c2b759ff1ab9952510b9b5cf7aff96">More...</a><br /></td></tr>
<tr class="separator:gaa7c2b759ff1ab9952510b9b5cf7aff96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa4adb4ac37e12bc96c1b3585c9447aba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa4adb4ac37e12bc96c1b3585c9447aba">XSDPS_INTR_CARD_REM_MASK</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:gaa4adb4ac37e12bc96c1b3585c9447aba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card Remove.  <a href="#gaa4adb4ac37e12bc96c1b3585c9447aba">More...</a><br /></td></tr>
<tr class="separator:gaa4adb4ac37e12bc96c1b3585c9447aba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b1b702abf5a0ff69ccc6383b0e5d9da"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3b1b702abf5a0ff69ccc6383b0e5d9da">XSDPS_INTR_CARD_MASK</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:ga3b1b702abf5a0ff69ccc6383b0e5d9da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card Interrupt.  <a href="#ga3b1b702abf5a0ff69ccc6383b0e5d9da">More...</a><br /></td></tr>
<tr class="separator:ga3b1b702abf5a0ff69ccc6383b0e5d9da"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga964e307b375ae74c1eaf4c80424626f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga964e307b375ae74c1eaf4c80424626f5">XSDPS_INTR_INT_A_MASK</a>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="memdesc:ga964e307b375ae74c1eaf4c80424626f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">INT A Interrupt.  <a href="#ga964e307b375ae74c1eaf4c80424626f5">More...</a><br /></td></tr>
<tr class="separator:ga964e307b375ae74c1eaf4c80424626f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6acf366156b796a418bbdc3549dc0a09"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6acf366156b796a418bbdc3549dc0a09">XSDPS_INTR_INT_B_MASK</a>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="memdesc:ga6acf366156b796a418bbdc3549dc0a09"><td class="mdescLeft">&#160;</td><td class="mdescRight">INT B Interrupt.  <a href="#ga6acf366156b796a418bbdc3549dc0a09">More...</a><br /></td></tr>
<tr class="separator:ga6acf366156b796a418bbdc3549dc0a09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga69fae19f390aed99650ce4c01e3908d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga69fae19f390aed99650ce4c01e3908d3">XSDPS_INTR_INT_C_MASK</a>&#160;&#160;&#160;0x00000800U</td></tr>
<tr class="memdesc:ga69fae19f390aed99650ce4c01e3908d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">INT C Interrupt.  <a href="#ga69fae19f390aed99650ce4c01e3908d3">More...</a><br /></td></tr>
<tr class="separator:ga69fae19f390aed99650ce4c01e3908d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9cbac1a02ae6280d17d3e928566ebef0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga9cbac1a02ae6280d17d3e928566ebef0">XSDPS_INTR_RE_TUNING_MASK</a>&#160;&#160;&#160;0x00001000U</td></tr>
<tr class="memdesc:ga9cbac1a02ae6280d17d3e928566ebef0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Re-Tuning Interrupt.  <a href="#ga9cbac1a02ae6280d17d3e928566ebef0">More...</a><br /></td></tr>
<tr class="separator:ga9cbac1a02ae6280d17d3e928566ebef0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88d6aea5ee66dcbcde471075077698c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga88d6aea5ee66dcbcde471075077698c5">XSDPS_INTR_BOOT_ACK_RECV_MASK</a>&#160;&#160;&#160;0x00002000U</td></tr>
<tr class="memdesc:ga88d6aea5ee66dcbcde471075077698c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Boot Ack Recv Interrupt.  <a href="#ga88d6aea5ee66dcbcde471075077698c5">More...</a><br /></td></tr>
<tr class="separator:ga88d6aea5ee66dcbcde471075077698c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa6362c409b3b455ed19ec98a0b51b3b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa6362c409b3b455ed19ec98a0b51b3b3">XSDPS_INTR_BOOT_TERM_MASK</a>&#160;&#160;&#160;0x00004000U</td></tr>
<tr class="memdesc:gaa6362c409b3b455ed19ec98a0b51b3b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Boot Terminate Interrupt.  <a href="#gaa6362c409b3b455ed19ec98a0b51b3b3">More...</a><br /></td></tr>
<tr class="separator:gaa6362c409b3b455ed19ec98a0b51b3b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga322ecca01a208464114226107c6a2961"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga322ecca01a208464114226107c6a2961">XSDPS_INTR_ERR_MASK</a>&#160;&#160;&#160;0x00008000U</td></tr>
<tr class="memdesc:ga322ecca01a208464114226107c6a2961"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error Interrupt.  <a href="#ga322ecca01a208464114226107c6a2961">More...</a><br /></td></tr>
<tr class="separator:ga322ecca01a208464114226107c6a2961"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b85cffecaaadc6662cf6b08ce1ca0eb"><td class="memItemLeft" align="right" valign="top"><a id="ga3b85cffecaaadc6662cf6b08ce1ca0eb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_NORM_INTR_ALL_MASK</b>&#160;&#160;&#160;0x0000FFFFU</td></tr>
<tr class="separator:ga3b85cffecaaadc6662cf6b08ce1ca0eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae2736e5f9616fa0a8093c032d73e8c06"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gae2736e5f9616fa0a8093c032d73e8c06">XSDPS_INTR_ERR_CT_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gae2736e5f9616fa0a8093c032d73e8c06"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Timeout Error.  <a href="#gae2736e5f9616fa0a8093c032d73e8c06">More...</a><br /></td></tr>
<tr class="separator:gae2736e5f9616fa0a8093c032d73e8c06"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga356b1f6f6eb40bdb4962f7b95d4e74cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga356b1f6f6eb40bdb4962f7b95d4e74cc">XSDPS_INTR_ERR_CCRC_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga356b1f6f6eb40bdb4962f7b95d4e74cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command CRC Error.  <a href="#ga356b1f6f6eb40bdb4962f7b95d4e74cc">More...</a><br /></td></tr>
<tr class="separator:ga356b1f6f6eb40bdb4962f7b95d4e74cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51fa8b4e90349c15b2b4c6cf15b244fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga51fa8b4e90349c15b2b4c6cf15b244fe">XSDPS_INTR_ERR_CEB_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga51fa8b4e90349c15b2b4c6cf15b244fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command End Bit Error.  <a href="#ga51fa8b4e90349c15b2b4c6cf15b244fe">More...</a><br /></td></tr>
<tr class="separator:ga51fa8b4e90349c15b2b4c6cf15b244fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga473884b57279b144c031a78c806f296a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga473884b57279b144c031a78c806f296a">XSDPS_INTR_ERR_CI_MASK</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga473884b57279b144c031a78c806f296a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Index Error.  <a href="#ga473884b57279b144c031a78c806f296a">More...</a><br /></td></tr>
<tr class="separator:ga473884b57279b144c031a78c806f296a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73b422b3ba2abff3ca25606fdbd80618"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga73b422b3ba2abff3ca25606fdbd80618">XSDPS_INTR_ERR_DT_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga73b422b3ba2abff3ca25606fdbd80618"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Timeout Error.  <a href="#ga73b422b3ba2abff3ca25606fdbd80618">More...</a><br /></td></tr>
<tr class="separator:ga73b422b3ba2abff3ca25606fdbd80618"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga849509ac4a8f9c74cd379e08f98ffa39"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga849509ac4a8f9c74cd379e08f98ffa39">XSDPS_INTR_ERR_DCRC_MASK</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga849509ac4a8f9c74cd379e08f98ffa39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data CRC Error.  <a href="#ga849509ac4a8f9c74cd379e08f98ffa39">More...</a><br /></td></tr>
<tr class="separator:ga849509ac4a8f9c74cd379e08f98ffa39"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga01c4cf977a20ba47e930cf8238a913c7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga01c4cf977a20ba47e930cf8238a913c7">XSDPS_INTR_ERR_DEB_MASK</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga01c4cf977a20ba47e930cf8238a913c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data End Bit Error.  <a href="#ga01c4cf977a20ba47e930cf8238a913c7">More...</a><br /></td></tr>
<tr class="separator:ga01c4cf977a20ba47e930cf8238a913c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0dcbe29c28355e236a13b1ae0254d230"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0dcbe29c28355e236a13b1ae0254d230">XSDPS_INTR_ERR_CUR_LMT_MASK</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:ga0dcbe29c28355e236a13b1ae0254d230"><td class="mdescLeft">&#160;</td><td class="mdescRight">Current Limit Error.  <a href="#ga0dcbe29c28355e236a13b1ae0254d230">More...</a><br /></td></tr>
<tr class="separator:ga0dcbe29c28355e236a13b1ae0254d230"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga873a2c76cf80e26d31e9ee227453fcee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga873a2c76cf80e26d31e9ee227453fcee">XSDPS_INTR_ERR_AUTO_CMD12_MASK</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:ga873a2c76cf80e26d31e9ee227453fcee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD12 Error.  <a href="#ga873a2c76cf80e26d31e9ee227453fcee">More...</a><br /></td></tr>
<tr class="separator:ga873a2c76cf80e26d31e9ee227453fcee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5adf2824bddb770961a5dd1336d2b581"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5adf2824bddb770961a5dd1336d2b581">XSDPS_INTR_ERR_ADMA_MASK</a>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="memdesc:ga5adf2824bddb770961a5dd1336d2b581"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Error.  <a href="#ga5adf2824bddb770961a5dd1336d2b581">More...</a><br /></td></tr>
<tr class="separator:ga5adf2824bddb770961a5dd1336d2b581"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0339ecbff53196547e90f18a9f1a0705"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0339ecbff53196547e90f18a9f1a0705">XSDPS_INTR_ERR_TR_MASK</a>&#160;&#160;&#160;0x00001000U</td></tr>
<tr class="memdesc:ga0339ecbff53196547e90f18a9f1a0705"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tuning Error.  <a href="#ga0339ecbff53196547e90f18a9f1a0705">More...</a><br /></td></tr>
<tr class="separator:ga0339ecbff53196547e90f18a9f1a0705"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa9895662840100832b44870fb9c805ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa9895662840100832b44870fb9c805ba">XSDPS_INTR_VEND_SPF_ERR_MASK</a>&#160;&#160;&#160;0x0000E000U</td></tr>
<tr class="memdesc:gaa9895662840100832b44870fb9c805ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vendor Specific Error.  <a href="#gaa9895662840100832b44870fb9c805ba">More...</a><br /></td></tr>
<tr class="separator:gaa9895662840100832b44870fb9c805ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad18091c797badbc471309b3e306de17c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad18091c797badbc471309b3e306de17c">XSDPS_ERROR_INTR_ALL_MASK</a>&#160;&#160;&#160;0x0000F3FFU</td></tr>
<tr class="memdesc:gad18091c797badbc471309b3e306de17c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask for error bits.  <a href="#gad18091c797badbc471309b3e306de17c">More...</a><br /></td></tr>
<tr class="separator:gad18091c797badbc471309b3e306de17c"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Block Size and Block Count Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpbafb26400aaa9b3514c5e7e16c06cf3b"></a>This register contains the block count for current transfer, block size and SDMA buffer size.</p>
<p>Read/Write except for reserved bits. </p>
</td></tr>
<tr class="memitem:gaa50e45067119d5516ebd171efc11bdf1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa50e45067119d5516ebd171efc11bdf1">XSDPS_BLK_SIZE_MASK</a>&#160;&#160;&#160;0x00000FFFU</td></tr>
<tr class="memdesc:gaa50e45067119d5516ebd171efc11bdf1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer Block Size.  <a href="#gaa50e45067119d5516ebd171efc11bdf1">More...</a><br /></td></tr>
<tr class="separator:gaa50e45067119d5516ebd171efc11bdf1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34bf5de34374014e5a35b2fd77ae6182"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga34bf5de34374014e5a35b2fd77ae6182">XSDPS_SDMA_BUFF_SIZE_MASK</a>&#160;&#160;&#160;0x00007000U</td></tr>
<tr class="memdesc:ga34bf5de34374014e5a35b2fd77ae6182"><td class="mdescLeft">&#160;</td><td class="mdescRight">Host SDMA Buffer Size.  <a href="#ga34bf5de34374014e5a35b2fd77ae6182">More...</a><br /></td></tr>
<tr class="separator:ga34bf5de34374014e5a35b2fd77ae6182"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga56f45e36b2a83f16bc2db338921043d6"><td class="memItemLeft" align="right" valign="top"><a id="ga56f45e36b2a83f16bc2db338921043d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_BLK_SIZE_1024</b>&#160;&#160;&#160;0x400U</td></tr>
<tr class="separator:ga56f45e36b2a83f16bc2db338921043d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaff79ac21b266c61d39bc944134b88ab"><td class="memItemLeft" align="right" valign="top"><a id="gaaff79ac21b266c61d39bc944134b88ab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_BLK_SIZE_2048</b>&#160;&#160;&#160;0x800U</td></tr>
<tr class="separator:gaaff79ac21b266c61d39bc944134b88ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga396934244c45cbed279c43b9abadc7f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga396934244c45cbed279c43b9abadc7f9">XSDPS_BLK_CNT_MASK</a>&#160;&#160;&#160;0x0000FFFFU</td></tr>
<tr class="memdesc:ga396934244c45cbed279c43b9abadc7f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Count for Current Transfer.  <a href="#ga396934244c45cbed279c43b9abadc7f9">More...</a><br /></td></tr>
<tr class="separator:ga396934244c45cbed279c43b9abadc7f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Transfer Mode and Command Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpfdaec9fc8119432363a9ebd387b82184"></a>The Transfer Mode register is used to control the data transfers and Command register is used for command generation Read/Write except for reserved bits. </p>
</td></tr>
<tr class="memitem:ga0704e7175bffbe4b4f34c5597f2cf94f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0704e7175bffbe4b4f34c5597f2cf94f">XSDPS_TM_DMA_EN_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga0704e7175bffbe4b4f34c5597f2cf94f"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Enable.  <a href="#ga0704e7175bffbe4b4f34c5597f2cf94f">More...</a><br /></td></tr>
<tr class="separator:ga0704e7175bffbe4b4f34c5597f2cf94f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab68f2eb2928e7437148e9cd5d9b3a949"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab68f2eb2928e7437148e9cd5d9b3a949">XSDPS_TM_BLK_CNT_EN_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:gab68f2eb2928e7437148e9cd5d9b3a949"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block Count Enable.  <a href="#gab68f2eb2928e7437148e9cd5d9b3a949">More...</a><br /></td></tr>
<tr class="separator:gab68f2eb2928e7437148e9cd5d9b3a949"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ee1ea5d49f87e0e20ebdc0743ae9250"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6ee1ea5d49f87e0e20ebdc0743ae9250">XSDPS_TM_AUTO_CMD12_EN_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga6ee1ea5d49f87e0e20ebdc0743ae9250"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD12 Enable.  <a href="#ga6ee1ea5d49f87e0e20ebdc0743ae9250">More...</a><br /></td></tr>
<tr class="separator:ga6ee1ea5d49f87e0e20ebdc0743ae9250"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga99c6cb5b2afc9a13b2f7b2e03bb3ca5c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga99c6cb5b2afc9a13b2f7b2e03bb3ca5c">XSDPS_TM_DAT_DIR_SEL_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga99c6cb5b2afc9a13b2f7b2e03bb3ca5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Transfer Direction Select.  <a href="#ga99c6cb5b2afc9a13b2f7b2e03bb3ca5c">More...</a><br /></td></tr>
<tr class="separator:ga99c6cb5b2afc9a13b2f7b2e03bb3ca5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85051ce8cc4a768d1e8e912e782ce02e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga85051ce8cc4a768d1e8e912e782ce02e">XSDPS_TM_MUL_SIN_BLK_SEL_MASK</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga85051ce8cc4a768d1e8e912e782ce02e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multi/Single Block Select.  <a href="#ga85051ce8cc4a768d1e8e912e782ce02e">More...</a><br /></td></tr>
<tr class="separator:ga85051ce8cc4a768d1e8e912e782ce02e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58908f7a593a05f6e4fed72e674357f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga58908f7a593a05f6e4fed72e674357f0">XSDPS_CMD_RESP_SEL_MASK</a>&#160;&#160;&#160;0x00000003U</td></tr>
<tr class="memdesc:ga58908f7a593a05f6e4fed72e674357f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response Type Select.  <a href="#ga58908f7a593a05f6e4fed72e674357f0">More...</a><br /></td></tr>
<tr class="separator:ga58908f7a593a05f6e4fed72e674357f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga62463cbd471c830c64acf7d4ab41d76b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga62463cbd471c830c64acf7d4ab41d76b">XSDPS_CMD_RESP_NONE_MASK</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga62463cbd471c830c64acf7d4ab41d76b"><td class="mdescLeft">&#160;</td><td class="mdescRight">No Response.  <a href="#ga62463cbd471c830c64acf7d4ab41d76b">More...</a><br /></td></tr>
<tr class="separator:ga62463cbd471c830c64acf7d4ab41d76b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe5eec57bcd6cf8469b33aa6da746761"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gafe5eec57bcd6cf8469b33aa6da746761">XSDPS_CMD_RESP_L136_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gafe5eec57bcd6cf8469b33aa6da746761"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response length 138.  <a href="#gafe5eec57bcd6cf8469b33aa6da746761">More...</a><br /></td></tr>
<tr class="separator:gafe5eec57bcd6cf8469b33aa6da746761"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab1cb6a89e3d65cdd481cf4f6e5238653"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab1cb6a89e3d65cdd481cf4f6e5238653">XSDPS_CMD_RESP_L48_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:gab1cb6a89e3d65cdd481cf4f6e5238653"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response length 48.  <a href="#gab1cb6a89e3d65cdd481cf4f6e5238653">More...</a><br /></td></tr>
<tr class="separator:gab1cb6a89e3d65cdd481cf4f6e5238653"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga68fcef0c7fa75e2a8db1179870ea7ef5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga68fcef0c7fa75e2a8db1179870ea7ef5">XSDPS_CMD_RESP_L48_BSY_CHK_MASK</a>&#160;&#160;&#160;0x00000003U</td></tr>
<tr class="memdesc:ga68fcef0c7fa75e2a8db1179870ea7ef5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response length 48 &amp; check busy after response.  <a href="#ga68fcef0c7fa75e2a8db1179870ea7ef5">More...</a><br /></td></tr>
<tr class="separator:ga68fcef0c7fa75e2a8db1179870ea7ef5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1371f2d04ef2229cb465eb578b506e40"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1371f2d04ef2229cb465eb578b506e40">XSDPS_CMD_CRC_CHK_EN_MASK</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga1371f2d04ef2229cb465eb578b506e40"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command CRC Check Enable.  <a href="#ga1371f2d04ef2229cb465eb578b506e40">More...</a><br /></td></tr>
<tr class="separator:ga1371f2d04ef2229cb465eb578b506e40"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3d5faaad12dc07797d5ae69e67319efb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3d5faaad12dc07797d5ae69e67319efb">XSDPS_CMD_INX_CHK_EN_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga3d5faaad12dc07797d5ae69e67319efb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Index Check Enable.  <a href="#ga3d5faaad12dc07797d5ae69e67319efb">More...</a><br /></td></tr>
<tr class="separator:ga3d5faaad12dc07797d5ae69e67319efb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9024b7da140cf1c18555825b3827750"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac9024b7da140cf1c18555825b3827750">XSDPS_DAT_PRESENT_SEL_MASK</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:gac9024b7da140cf1c18555825b3827750"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Present Select.  <a href="#gac9024b7da140cf1c18555825b3827750">More...</a><br /></td></tr>
<tr class="separator:gac9024b7da140cf1c18555825b3827750"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga326debf8eb92650f6d51bed52604ee8c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga326debf8eb92650f6d51bed52604ee8c">XSDPS_CMD_TYPE_MASK</a>&#160;&#160;&#160;0x000000C0U</td></tr>
<tr class="memdesc:ga326debf8eb92650f6d51bed52604ee8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Type.  <a href="#ga326debf8eb92650f6d51bed52604ee8c">More...</a><br /></td></tr>
<tr class="separator:ga326debf8eb92650f6d51bed52604ee8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga845855412bf4852727b11344c477488f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga845855412bf4852727b11344c477488f">XSDPS_CMD_TYPE_NORM_MASK</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga845855412bf4852727b11344c477488f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CMD Type - Normal.  <a href="#ga845855412bf4852727b11344c477488f">More...</a><br /></td></tr>
<tr class="separator:ga845855412bf4852727b11344c477488f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0c332a6fc7e9df562458b562acb0c2b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0c332a6fc7e9df562458b562acb0c2b7">XSDPS_CMD_TYPE_SUSPEND_MASK</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga0c332a6fc7e9df562458b562acb0c2b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">CMD Type - Suspend.  <a href="#ga0c332a6fc7e9df562458b562acb0c2b7">More...</a><br /></td></tr>
<tr class="separator:ga0c332a6fc7e9df562458b562acb0c2b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0716c4ab5fafe32678697eccfef91ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad0716c4ab5fafe32678697eccfef91ad">XSDPS_CMD_TYPE_RESUME_MASK</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:gad0716c4ab5fafe32678697eccfef91ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">CMD Type - Resume.  <a href="#gad0716c4ab5fafe32678697eccfef91ad">More...</a><br /></td></tr>
<tr class="separator:gad0716c4ab5fafe32678697eccfef91ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafb4281cc2c9c320698dd68bbb3c4df78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gafb4281cc2c9c320698dd68bbb3c4df78">XSDPS_CMD_TYPE_ABORT_MASK</a>&#160;&#160;&#160;0x000000C0U</td></tr>
<tr class="memdesc:gafb4281cc2c9c320698dd68bbb3c4df78"><td class="mdescLeft">&#160;</td><td class="mdescRight">CMD Type - Abort.  <a href="#gafb4281cc2c9c320698dd68bbb3c4df78">More...</a><br /></td></tr>
<tr class="separator:gafb4281cc2c9c320698dd68bbb3c4df78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada823ff9354fcf1af9205e7b952f95e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gada823ff9354fcf1af9205e7b952f95e9">XSDPS_CMD_MASK</a>&#160;&#160;&#160;0x00003F00U</td></tr>
<tr class="memdesc:gada823ff9354fcf1af9205e7b952f95e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Index Mask - Set to CMD0-63, AMCD0-63.  <a href="#gada823ff9354fcf1af9205e7b952f95e9">More...</a><br /></td></tr>
<tr class="separator:gada823ff9354fcf1af9205e7b952f95e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Auto CMD Error Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp73bc36daa5b07b2bcf98e4de242435a2"></a>This register is read only register which contains information about the error status of Auto CMD 12 and 23.</p>
<p>Read Only </p>
</td></tr>
<tr class="memitem:ga447fb2a75530d416f83d811f94da248e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga447fb2a75530d416f83d811f94da248e">XSDPS_AUTO_CMD12_NT_EX_MASK</a>&#160;&#160;&#160;0x0001U</td></tr>
<tr class="memdesc:ga447fb2a75530d416f83d811f94da248e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD12 Not executed.  <a href="#ga447fb2a75530d416f83d811f94da248e">More...</a><br /></td></tr>
<tr class="separator:ga447fb2a75530d416f83d811f94da248e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae60ddda28770340f4190c68b21d7f6a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gae60ddda28770340f4190c68b21d7f6a9">XSDPS_AUTO_CMD_TOUT_MASK</a>&#160;&#160;&#160;0x0002U</td></tr>
<tr class="memdesc:gae60ddda28770340f4190c68b21d7f6a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD Timeout Error.  <a href="#gae60ddda28770340f4190c68b21d7f6a9">More...</a><br /></td></tr>
<tr class="separator:gae60ddda28770340f4190c68b21d7f6a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga38d51bdd8a0211a3b9fef58b273f1110"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga38d51bdd8a0211a3b9fef58b273f1110">XSDPS_AUTO_CMD_CRC_MASK</a>&#160;&#160;&#160;0x0004U</td></tr>
<tr class="memdesc:ga38d51bdd8a0211a3b9fef58b273f1110"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD CRC Error.  <a href="#ga38d51bdd8a0211a3b9fef58b273f1110">More...</a><br /></td></tr>
<tr class="separator:ga38d51bdd8a0211a3b9fef58b273f1110"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga56e320482742e6a619a2aa42b294f860"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga56e320482742e6a619a2aa42b294f860">XSDPS_AUTO_CMD_EB_MASK</a>&#160;&#160;&#160;0x0008U</td></tr>
<tr class="memdesc:ga56e320482742e6a619a2aa42b294f860"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD End Bit Error.  <a href="#ga56e320482742e6a619a2aa42b294f860">More...</a><br /></td></tr>
<tr class="separator:ga56e320482742e6a619a2aa42b294f860"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac39616d27b0373ada7d57f69fa96b235"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac39616d27b0373ada7d57f69fa96b235">XSDPS_AUTO_CMD_IND_MASK</a>&#160;&#160;&#160;0x0010U</td></tr>
<tr class="memdesc:gac39616d27b0373ada7d57f69fa96b235"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD Index Error.  <a href="#gac39616d27b0373ada7d57f69fa96b235">More...</a><br /></td></tr>
<tr class="separator:gac39616d27b0373ada7d57f69fa96b235"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadbc1089a0e07fe03b441d7224eba5c10"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gadbc1089a0e07fe03b441d7224eba5c10">XSDPS_AUTO_CMD_CNI_ERR_MASK</a>&#160;&#160;&#160;0x0080U</td></tr>
<tr class="memdesc:gadbc1089a0e07fe03b441d7224eba5c10"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command not issued by Auto CMD12 Error.  <a href="#gadbc1089a0e07fe03b441d7224eba5c10">More...</a><br /></td></tr>
<tr class="separator:gadbc1089a0e07fe03b441d7224eba5c10"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Host Control2 Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp451728dd07084b2c619429faa0056eff"></a>This register contains extended configuration bits.</p>
<p>Read Write </p>
</td></tr>
<tr class="memitem:ga137b2781f85ffdfea87a8db1dcdcdcb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga137b2781f85ffdfea87a8db1dcdcdcb9">XSDPS_HC2_UHS_MODE_MASK</a>&#160;&#160;&#160;0x0007U</td></tr>
<tr class="memdesc:ga137b2781f85ffdfea87a8db1dcdcdcb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">UHS Mode select bits.  <a href="#ga137b2781f85ffdfea87a8db1dcdcdcb9">More...</a><br /></td></tr>
<tr class="separator:ga137b2781f85ffdfea87a8db1dcdcdcb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga808fb682506fc651c6d6ee0a909acb0c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga808fb682506fc651c6d6ee0a909acb0c">XSDPS_HC2_UHS_MODE_SDR12_MASK</a>&#160;&#160;&#160;0x0000U</td></tr>
<tr class="memdesc:ga808fb682506fc651c6d6ee0a909acb0c"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDR12 UHS Mode.  <a href="#ga808fb682506fc651c6d6ee0a909acb0c">More...</a><br /></td></tr>
<tr class="separator:ga808fb682506fc651c6d6ee0a909acb0c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5eadbc34e65c3faf83e6d68a49a2c04f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5eadbc34e65c3faf83e6d68a49a2c04f">XSDPS_HC2_UHS_MODE_SDR25_MASK</a>&#160;&#160;&#160;0x0001U</td></tr>
<tr class="memdesc:ga5eadbc34e65c3faf83e6d68a49a2c04f"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDR25 UHS Mode.  <a href="#ga5eadbc34e65c3faf83e6d68a49a2c04f">More...</a><br /></td></tr>
<tr class="separator:ga5eadbc34e65c3faf83e6d68a49a2c04f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga981a556047754194a28706b1cb30f082"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga981a556047754194a28706b1cb30f082">XSDPS_HC2_UHS_MODE_SDR50_MASK</a>&#160;&#160;&#160;0x0002U</td></tr>
<tr class="memdesc:ga981a556047754194a28706b1cb30f082"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDR50 UHS Mode.  <a href="#ga981a556047754194a28706b1cb30f082">More...</a><br /></td></tr>
<tr class="separator:ga981a556047754194a28706b1cb30f082"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2788488008f5eaf8d4756ea282f1ef68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga2788488008f5eaf8d4756ea282f1ef68">XSDPS_HC2_UHS_MODE_SDR104_MASK</a>&#160;&#160;&#160;0x0003U</td></tr>
<tr class="memdesc:ga2788488008f5eaf8d4756ea282f1ef68"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDR104 UHS Mode.  <a href="#ga2788488008f5eaf8d4756ea282f1ef68">More...</a><br /></td></tr>
<tr class="separator:ga2788488008f5eaf8d4756ea282f1ef68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga278cc6b488db8707244f12c63d94b305"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga278cc6b488db8707244f12c63d94b305">XSDPS_HC2_UHS_MODE_DDR50_MASK</a>&#160;&#160;&#160;0x0004U</td></tr>
<tr class="memdesc:ga278cc6b488db8707244f12c63d94b305"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR50 UHS Mode.  <a href="#ga278cc6b488db8707244f12c63d94b305">More...</a><br /></td></tr>
<tr class="separator:ga278cc6b488db8707244f12c63d94b305"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34b97943b05c5e36e76bb33c110bf5ec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga34b97943b05c5e36e76bb33c110bf5ec">XSDPS_HC2_1V8_EN_MASK</a>&#160;&#160;&#160;0x0008U</td></tr>
<tr class="memdesc:ga34b97943b05c5e36e76bb33c110bf5ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">1.8V Signal Enable  <a href="#ga34b97943b05c5e36e76bb33c110bf5ec">More...</a><br /></td></tr>
<tr class="separator:ga34b97943b05c5e36e76bb33c110bf5ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2d1236addf75c3005c78496a279568cd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga2d1236addf75c3005c78496a279568cd">XSDPS_HC2_DRV_STR_SEL_MASK</a>&#160;&#160;&#160;0x0030U</td></tr>
<tr class="memdesc:ga2d1236addf75c3005c78496a279568cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength Selection.  <a href="#ga2d1236addf75c3005c78496a279568cd">More...</a><br /></td></tr>
<tr class="separator:ga2d1236addf75c3005c78496a279568cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad864537837f8bf00fcbdba40d98d2c22"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad864537837f8bf00fcbdba40d98d2c22">XSDPS_HC2_DRV_STR_B_MASK</a>&#160;&#160;&#160;0x0000U</td></tr>
<tr class="memdesc:gad864537837f8bf00fcbdba40d98d2c22"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength B.  <a href="#gad864537837f8bf00fcbdba40d98d2c22">More...</a><br /></td></tr>
<tr class="separator:gad864537837f8bf00fcbdba40d98d2c22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad867fc96ee217a8d25427e7e73e60d84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad867fc96ee217a8d25427e7e73e60d84">XSDPS_HC2_DRV_STR_A_MASK</a>&#160;&#160;&#160;0x0010U</td></tr>
<tr class="memdesc:gad867fc96ee217a8d25427e7e73e60d84"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength A.  <a href="#gad867fc96ee217a8d25427e7e73e60d84">More...</a><br /></td></tr>
<tr class="separator:gad867fc96ee217a8d25427e7e73e60d84"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac0d91eb2b8c929cccc70eece21feda20"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac0d91eb2b8c929cccc70eece21feda20">XSDPS_HC2_DRV_STR_C_MASK</a>&#160;&#160;&#160;0x0020U</td></tr>
<tr class="memdesc:gac0d91eb2b8c929cccc70eece21feda20"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength C.  <a href="#gac0d91eb2b8c929cccc70eece21feda20">More...</a><br /></td></tr>
<tr class="separator:gac0d91eb2b8c929cccc70eece21feda20"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga235987e057b393b5030dc9458c2758a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga235987e057b393b5030dc9458c2758a1">XSDPS_HC2_DRV_STR_D_MASK</a>&#160;&#160;&#160;0x0030U</td></tr>
<tr class="memdesc:ga235987e057b393b5030dc9458c2758a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength D.  <a href="#ga235987e057b393b5030dc9458c2758a1">More...</a><br /></td></tr>
<tr class="separator:ga235987e057b393b5030dc9458c2758a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08e0062ddf1561584e922d35239dc874"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga08e0062ddf1561584e922d35239dc874">XSDPS_HC2_EXEC_TNG_MASK</a>&#160;&#160;&#160;0x0040U</td></tr>
<tr class="memdesc:ga08e0062ddf1561584e922d35239dc874"><td class="mdescLeft">&#160;</td><td class="mdescRight">Execute Tuning.  <a href="#ga08e0062ddf1561584e922d35239dc874">More...</a><br /></td></tr>
<tr class="separator:ga08e0062ddf1561584e922d35239dc874"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaedb760cc7b7e76483fd55cf813c77aa4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaedb760cc7b7e76483fd55cf813c77aa4">XSDPS_HC2_SAMP_CLK_SEL_MASK</a>&#160;&#160;&#160;0x0080U</td></tr>
<tr class="memdesc:gaedb760cc7b7e76483fd55cf813c77aa4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling Clock Selection.  <a href="#gaedb760cc7b7e76483fd55cf813c77aa4">More...</a><br /></td></tr>
<tr class="separator:gaedb760cc7b7e76483fd55cf813c77aa4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8fd430bfd1b55b0af5e957c4ec819497"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga8fd430bfd1b55b0af5e957c4ec819497">XSDPS_HC2_ASYNC_INTR_EN_MASK</a>&#160;&#160;&#160;0x4000U</td></tr>
<tr class="memdesc:ga8fd430bfd1b55b0af5e957c4ec819497"><td class="mdescLeft">&#160;</td><td class="mdescRight">Asynchronous Interrupt Enable.  <a href="#ga8fd430bfd1b55b0af5e957c4ec819497">More...</a><br /></td></tr>
<tr class="separator:ga8fd430bfd1b55b0af5e957c4ec819497"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c112853e3726cf385e6989410c31a3e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga9c112853e3726cf385e6989410c31a3e">XSDPS_HC2_PRE_VAL_EN_MASK</a>&#160;&#160;&#160;0x8000U</td></tr>
<tr class="memdesc:ga9c112853e3726cf385e6989410c31a3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Preset Value Enable.  <a href="#ga9c112853e3726cf385e6989410c31a3e">More...</a><br /></td></tr>
<tr class="separator:ga9c112853e3726cf385e6989410c31a3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Capabilities Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp9ad1f6019f79b76fa5db23da20f5613f"></a>Capabilities register is a read only register which contains information about the host controller.</p>
<p>Sufficient if read once after power on. Read Only </p>
</td></tr>
<tr class="memitem:ga7f2419c84165de7490b986fb72628bb7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga7f2419c84165de7490b986fb72628bb7">XSDPS_CAP_TOUT_CLK_FREQ_MASK</a>&#160;&#160;&#160;0x0000003FU</td></tr>
<tr class="memdesc:ga7f2419c84165de7490b986fb72628bb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timeout clock freq select.  <a href="#ga7f2419c84165de7490b986fb72628bb7">More...</a><br /></td></tr>
<tr class="separator:ga7f2419c84165de7490b986fb72628bb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaddc6983923c3eb7697ee7a3bb638763b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaddc6983923c3eb7697ee7a3bb638763b">XSDPS_CAP_TOUT_CLK_UNIT_MASK</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:gaddc6983923c3eb7697ee7a3bb638763b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timeout clock unit - MHz/KHz.  <a href="#gaddc6983923c3eb7697ee7a3bb638763b">More...</a><br /></td></tr>
<tr class="separator:gaddc6983923c3eb7697ee7a3bb638763b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6a4730dbebc21ca61352252cbae7491f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6a4730dbebc21ca61352252cbae7491f">XSDPS_CAP_MAX_BLK_LEN_MASK</a>&#160;&#160;&#160;0x00030000U</td></tr>
<tr class="memdesc:ga6a4730dbebc21ca61352252cbae7491f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max block length.  <a href="#ga6a4730dbebc21ca61352252cbae7491f">More...</a><br /></td></tr>
<tr class="separator:ga6a4730dbebc21ca61352252cbae7491f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab7a95db0b6370a5f9e8c1ac1979ba4f7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab7a95db0b6370a5f9e8c1ac1979ba4f7">XSDPS_CAP_MAX_BLK_LEN_512B_MASK</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:gab7a95db0b6370a5f9e8c1ac1979ba4f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max block 512 bytes.  <a href="#gab7a95db0b6370a5f9e8c1ac1979ba4f7">More...</a><br /></td></tr>
<tr class="separator:gab7a95db0b6370a5f9e8c1ac1979ba4f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5067222814c18b97f99d595e997ee0bf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5067222814c18b97f99d595e997ee0bf">XSDPS_CAP_MAX_BL_LN_1024_MASK</a>&#160;&#160;&#160;0x00010000U</td></tr>
<tr class="memdesc:ga5067222814c18b97f99d595e997ee0bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max block 1024 bytes.  <a href="#ga5067222814c18b97f99d595e997ee0bf">More...</a><br /></td></tr>
<tr class="separator:ga5067222814c18b97f99d595e997ee0bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd23e275b15c0f7bc8afbec7a168e1b4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gadd23e275b15c0f7bc8afbec7a168e1b4">XSDPS_CAP_MAX_BL_LN_2048_MASK</a>&#160;&#160;&#160;0x00020000U</td></tr>
<tr class="memdesc:gadd23e275b15c0f7bc8afbec7a168e1b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max block 2048 bytes.  <a href="#gadd23e275b15c0f7bc8afbec7a168e1b4">More...</a><br /></td></tr>
<tr class="separator:gadd23e275b15c0f7bc8afbec7a168e1b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d1cc3e8e55cc7d3b8e23963a642728d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6d1cc3e8e55cc7d3b8e23963a642728d">XSDPS_CAP_MAX_BL_LN_4096_MASK</a>&#160;&#160;&#160;0x00030000U</td></tr>
<tr class="memdesc:ga6d1cc3e8e55cc7d3b8e23963a642728d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max block 4096 bytes.  <a href="#ga6d1cc3e8e55cc7d3b8e23963a642728d">More...</a><br /></td></tr>
<tr class="separator:ga6d1cc3e8e55cc7d3b8e23963a642728d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac9eea775c118859d00d475f7d226951"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaac9eea775c118859d00d475f7d226951">XSDPS_CAP_EXT_MEDIA_BUS_MASK</a>&#160;&#160;&#160;0x00040000U</td></tr>
<tr class="memdesc:gaac9eea775c118859d00d475f7d226951"><td class="mdescLeft">&#160;</td><td class="mdescRight">Extended media bus.  <a href="#gaac9eea775c118859d00d475f7d226951">More...</a><br /></td></tr>
<tr class="separator:gaac9eea775c118859d00d475f7d226951"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca16f624866b2ccde47ea963eae8283e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaca16f624866b2ccde47ea963eae8283e">XSDPS_CAP_ADMA2_MASK</a>&#160;&#160;&#160;0x00080000U</td></tr>
<tr class="memdesc:gaca16f624866b2ccde47ea963eae8283e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA2 support.  <a href="#gaca16f624866b2ccde47ea963eae8283e">More...</a><br /></td></tr>
<tr class="separator:gaca16f624866b2ccde47ea963eae8283e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga209f2596b4c455d08de11f26320d398d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga209f2596b4c455d08de11f26320d398d">XSDPS_CAP_HIGH_SPEED_MASK</a>&#160;&#160;&#160;0x00200000U</td></tr>
<tr class="memdesc:ga209f2596b4c455d08de11f26320d398d"><td class="mdescLeft">&#160;</td><td class="mdescRight">High speed support.  <a href="#ga209f2596b4c455d08de11f26320d398d">More...</a><br /></td></tr>
<tr class="separator:ga209f2596b4c455d08de11f26320d398d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga655f8c389059796e5527f68c56421309"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga655f8c389059796e5527f68c56421309">XSDPS_CAP_SDMA_MASK</a>&#160;&#160;&#160;0x00400000U</td></tr>
<tr class="memdesc:ga655f8c389059796e5527f68c56421309"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDMA support.  <a href="#ga655f8c389059796e5527f68c56421309">More...</a><br /></td></tr>
<tr class="separator:ga655f8c389059796e5527f68c56421309"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8bd1237a7e611d6e00301344d79e1fc1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga8bd1237a7e611d6e00301344d79e1fc1">XSDPS_CAP_SUSP_RESUME_MASK</a>&#160;&#160;&#160;0x00800000U</td></tr>
<tr class="memdesc:ga8bd1237a7e611d6e00301344d79e1fc1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Suspend/Resume support.  <a href="#ga8bd1237a7e611d6e00301344d79e1fc1">More...</a><br /></td></tr>
<tr class="separator:ga8bd1237a7e611d6e00301344d79e1fc1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga012393a10d9a75838355e716452d2ea3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga012393a10d9a75838355e716452d2ea3">XSDPS_CAP_VOLT_3V3_MASK</a>&#160;&#160;&#160;0x01000000U</td></tr>
<tr class="memdesc:ga012393a10d9a75838355e716452d2ea3"><td class="mdescLeft">&#160;</td><td class="mdescRight">3.3V support  <a href="#ga012393a10d9a75838355e716452d2ea3">More...</a><br /></td></tr>
<tr class="separator:ga012393a10d9a75838355e716452d2ea3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0b49ee267bef9af48701a0320f94f08"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gae0b49ee267bef9af48701a0320f94f08">XSDPS_CAP_VOLT_3V0_MASK</a>&#160;&#160;&#160;0x02000000U</td></tr>
<tr class="memdesc:gae0b49ee267bef9af48701a0320f94f08"><td class="mdescLeft">&#160;</td><td class="mdescRight">3.0V support  <a href="#gae0b49ee267bef9af48701a0320f94f08">More...</a><br /></td></tr>
<tr class="separator:gae0b49ee267bef9af48701a0320f94f08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9fc8bf6ab09eedf732a86202f9d7e70d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga9fc8bf6ab09eedf732a86202f9d7e70d">XSDPS_CAP_VOLT_1V8_MASK</a>&#160;&#160;&#160;0x04000000U</td></tr>
<tr class="memdesc:ga9fc8bf6ab09eedf732a86202f9d7e70d"><td class="mdescLeft">&#160;</td><td class="mdescRight">1.8V support  <a href="#ga9fc8bf6ab09eedf732a86202f9d7e70d">More...</a><br /></td></tr>
<tr class="separator:ga9fc8bf6ab09eedf732a86202f9d7e70d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga44be36e2ec02c85117ff4da3435e8bfe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga44be36e2ec02c85117ff4da3435e8bfe">XSDPS_CAP_SYS_BUS_64_MASK</a>&#160;&#160;&#160;0x10000000U</td></tr>
<tr class="memdesc:ga44be36e2ec02c85117ff4da3435e8bfe"><td class="mdescLeft">&#160;</td><td class="mdescRight">64 bit system bus support  <a href="#ga44be36e2ec02c85117ff4da3435e8bfe">More...</a><br /></td></tr>
<tr class="separator:ga44be36e2ec02c85117ff4da3435e8bfe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1dfb0f0abec6b472e9905f4c19b6f60e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1dfb0f0abec6b472e9905f4c19b6f60e">XSDPS_CAP_INTR_MODE_MASK</a>&#160;&#160;&#160;0x08000000U</td></tr>
<tr class="memdesc:ga1dfb0f0abec6b472e9905f4c19b6f60e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt mode support.  <a href="#ga1dfb0f0abec6b472e9905f4c19b6f60e">More...</a><br /></td></tr>
<tr class="separator:ga1dfb0f0abec6b472e9905f4c19b6f60e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac6e0e5e022e0172428ee6c91327b42a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac6e0e5e022e0172428ee6c91327b42a5">XSDPS_CAP_SPI_MODE_MASK</a>&#160;&#160;&#160;0x20000000U</td></tr>
<tr class="memdesc:gac6e0e5e022e0172428ee6c91327b42a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI mode.  <a href="#gac6e0e5e022e0172428ee6c91327b42a5">More...</a><br /></td></tr>
<tr class="separator:gac6e0e5e022e0172428ee6c91327b42a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga57b628afa64227b4ded9fbdb100be7bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga57b628afa64227b4ded9fbdb100be7bb">XSDPS_CAP_SPI_BLOCK_MODE_MASK</a>&#160;&#160;&#160;0x40000000U</td></tr>
<tr class="memdesc:ga57b628afa64227b4ded9fbdb100be7bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI block mode.  <a href="#ga57b628afa64227b4ded9fbdb100be7bb">More...</a><br /></td></tr>
<tr class="separator:ga57b628afa64227b4ded9fbdb100be7bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0ce78ece9fa1db9247804edafb13034"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab0ce78ece9fa1db9247804edafb13034">XSDPS_CAPS_ASYNC_INTR_MASK</a>&#160;&#160;&#160;0x20000000U</td></tr>
<tr class="memdesc:gab0ce78ece9fa1db9247804edafb13034"><td class="mdescLeft">&#160;</td><td class="mdescRight">Async Interrupt support.  <a href="#gab0ce78ece9fa1db9247804edafb13034">More...</a><br /></td></tr>
<tr class="separator:gab0ce78ece9fa1db9247804edafb13034"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f09ac71fb5dfdd6d31e03deb280347b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1f09ac71fb5dfdd6d31e03deb280347b">XSDPS_CAPS_SLOT_TYPE_MASK</a>&#160;&#160;&#160;0xC0000000U</td></tr>
<tr class="memdesc:ga1f09ac71fb5dfdd6d31e03deb280347b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Slot Type.  <a href="#ga1f09ac71fb5dfdd6d31e03deb280347b">More...</a><br /></td></tr>
<tr class="separator:ga1f09ac71fb5dfdd6d31e03deb280347b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d46349d0c937ae8d5e1b574fb770ef9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6d46349d0c937ae8d5e1b574fb770ef9">XSDPS_CAPS_REM_CARD</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga6d46349d0c937ae8d5e1b574fb770ef9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Removable Slot.  <a href="#ga6d46349d0c937ae8d5e1b574fb770ef9">More...</a><br /></td></tr>
<tr class="separator:ga6d46349d0c937ae8d5e1b574fb770ef9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga749d3d705d7e3932f795287e6eb67c8f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga749d3d705d7e3932f795287e6eb67c8f">XSDPS_CAPS_EMB_SLOT</a>&#160;&#160;&#160;0x40000000U</td></tr>
<tr class="memdesc:ga749d3d705d7e3932f795287e6eb67c8f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Embedded Slot.  <a href="#ga749d3d705d7e3932f795287e6eb67c8f">More...</a><br /></td></tr>
<tr class="separator:ga749d3d705d7e3932f795287e6eb67c8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65b992d6dfea0e058e00c186320fa920"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga65b992d6dfea0e058e00c186320fa920">XSDPS_CAPS_SHR_BUS</a>&#160;&#160;&#160;0x80000000U</td></tr>
<tr class="memdesc:ga65b992d6dfea0e058e00c186320fa920"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shared Bus Slot.  <a href="#ga65b992d6dfea0e058e00c186320fa920">More...</a><br /></td></tr>
<tr class="separator:ga65b992d6dfea0e058e00c186320fa920"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e35fb285d854c5116e1ca14753c565b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga6e35fb285d854c5116e1ca14753c565b">XSDPS_ECAPS_SDR50_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga6e35fb285d854c5116e1ca14753c565b"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDR50 Mode support.  <a href="#ga6e35fb285d854c5116e1ca14753c565b">More...</a><br /></td></tr>
<tr class="separator:ga6e35fb285d854c5116e1ca14753c565b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga796c9bb9f5baf6d76601508f1cfe0f72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga796c9bb9f5baf6d76601508f1cfe0f72">XSDPS_ECAPS_SDR104_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga796c9bb9f5baf6d76601508f1cfe0f72"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDR104 Mode support.  <a href="#ga796c9bb9f5baf6d76601508f1cfe0f72">More...</a><br /></td></tr>
<tr class="separator:ga796c9bb9f5baf6d76601508f1cfe0f72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50eccb3a870bc419cecf6c6da386dfbd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga50eccb3a870bc419cecf6c6da386dfbd">XSDPS_ECAPS_DDR50_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga50eccb3a870bc419cecf6c6da386dfbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR50 Mode support.  <a href="#ga50eccb3a870bc419cecf6c6da386dfbd">More...</a><br /></td></tr>
<tr class="separator:ga50eccb3a870bc419cecf6c6da386dfbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga12be303cc3c88264cd1e8ec72f09406b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga12be303cc3c88264cd1e8ec72f09406b">XSDPS_ECAPS_DRV_TYPE_A_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga12be303cc3c88264cd1e8ec72f09406b"><td class="mdescLeft">&#160;</td><td class="mdescRight">DriverType A support.  <a href="#ga12be303cc3c88264cd1e8ec72f09406b">More...</a><br /></td></tr>
<tr class="separator:ga12be303cc3c88264cd1e8ec72f09406b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga78700495c722e732fd3bda1ac5240990"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga78700495c722e732fd3bda1ac5240990">XSDPS_ECAPS_DRV_TYPE_C_MASK</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga78700495c722e732fd3bda1ac5240990"><td class="mdescLeft">&#160;</td><td class="mdescRight">DriverType C support.  <a href="#ga78700495c722e732fd3bda1ac5240990">More...</a><br /></td></tr>
<tr class="separator:ga78700495c722e732fd3bda1ac5240990"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada67e1bfc4eb0435d1dfa9057363ec7a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gada67e1bfc4eb0435d1dfa9057363ec7a">XSDPS_ECAPS_DRV_TYPE_D_MASK</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:gada67e1bfc4eb0435d1dfa9057363ec7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">DriverType D support.  <a href="#gada67e1bfc4eb0435d1dfa9057363ec7a">More...</a><br /></td></tr>
<tr class="separator:gada67e1bfc4eb0435d1dfa9057363ec7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad5eced61356597cec9544b57f20a6950"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad5eced61356597cec9544b57f20a6950">XSDPS_ECAPS_TMR_CNT_MASK</a>&#160;&#160;&#160;0x00000F00U</td></tr>
<tr class="memdesc:gad5eced61356597cec9544b57f20a6950"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timer Count for Re-tuning.  <a href="#gad5eced61356597cec9544b57f20a6950">More...</a><br /></td></tr>
<tr class="separator:gad5eced61356597cec9544b57f20a6950"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad6f0ea0730e8f48c9419cefe9b13f418"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad6f0ea0730e8f48c9419cefe9b13f418">XSDPS_ECAPS_USE_TNG_SDR50_MASK</a>&#160;&#160;&#160;0x00002000U</td></tr>
<tr class="memdesc:gad6f0ea0730e8f48c9419cefe9b13f418"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDR50 Mode needs tuning.  <a href="#gad6f0ea0730e8f48c9419cefe9b13f418">More...</a><br /></td></tr>
<tr class="separator:gad6f0ea0730e8f48c9419cefe9b13f418"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga91f9aa179e225dd0bd2774ddf3db1135"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga91f9aa179e225dd0bd2774ddf3db1135">XSDPS_ECAPS_RE_TNG_MODES_MASK</a>&#160;&#160;&#160;0x0000C000U</td></tr>
<tr class="memdesc:ga91f9aa179e225dd0bd2774ddf3db1135"><td class="mdescLeft">&#160;</td><td class="mdescRight">Re-tuning modes support.  <a href="#ga91f9aa179e225dd0bd2774ddf3db1135">More...</a><br /></td></tr>
<tr class="separator:ga91f9aa179e225dd0bd2774ddf3db1135"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3446aa973756cc6e19abad21145ba816"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3446aa973756cc6e19abad21145ba816">XSDPS_ECAPS_RE_TNG_MODE1_MASK</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga3446aa973756cc6e19abad21145ba816"><td class="mdescLeft">&#160;</td><td class="mdescRight">Re-tuning mode 1.  <a href="#ga3446aa973756cc6e19abad21145ba816">More...</a><br /></td></tr>
<tr class="separator:ga3446aa973756cc6e19abad21145ba816"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e3e2528cd51b841ac13c14f4925437f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5e3e2528cd51b841ac13c14f4925437f">XSDPS_ECAPS_RE_TNG_MODE2_MASK</a>&#160;&#160;&#160;0x00004000U</td></tr>
<tr class="memdesc:ga5e3e2528cd51b841ac13c14f4925437f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Re-tuning mode 2.  <a href="#ga5e3e2528cd51b841ac13c14f4925437f">More...</a><br /></td></tr>
<tr class="separator:ga5e3e2528cd51b841ac13c14f4925437f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5446616f12b2bd88db6bffb478ea6cc7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5446616f12b2bd88db6bffb478ea6cc7">XSDPS_ECAPS_RE_TNG_MODE3_MASK</a>&#160;&#160;&#160;0x00008000U</td></tr>
<tr class="memdesc:ga5446616f12b2bd88db6bffb478ea6cc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Re-tuning mode 3.  <a href="#ga5446616f12b2bd88db6bffb478ea6cc7">More...</a><br /></td></tr>
<tr class="separator:ga5446616f12b2bd88db6bffb478ea6cc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9c1337b4b216e1c3777aaf0b3448824"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab9c1337b4b216e1c3777aaf0b3448824">XSDPS_ECAPS_CLK_MULT_MASK</a>&#160;&#160;&#160;0x00FF0000U</td></tr>
<tr class="memdesc:gab9c1337b4b216e1c3777aaf0b3448824"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock Multiplier value for Programmable clock mode.  <a href="#gab9c1337b4b216e1c3777aaf0b3448824">More...</a><br /></td></tr>
<tr class="separator:gab9c1337b4b216e1c3777aaf0b3448824"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad392e784af056b8f8da5b0f775812aac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad392e784af056b8f8da5b0f775812aac">XSDPS_ECAPS_SPI_MODE_MASK</a>&#160;&#160;&#160;0x01000000U</td></tr>
<tr class="memdesc:gad392e784af056b8f8da5b0f775812aac"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI mode.  <a href="#gad392e784af056b8f8da5b0f775812aac">More...</a><br /></td></tr>
<tr class="separator:gad392e784af056b8f8da5b0f775812aac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf14a3c87b813e9658946392db281aa34"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaf14a3c87b813e9658946392db281aa34">XSDPS_ECAPS_SPI_BLK_MODE_MASK</a>&#160;&#160;&#160;0x02000000U</td></tr>
<tr class="memdesc:gaf14a3c87b813e9658946392db281aa34"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI block mode.  <a href="#gaf14a3c87b813e9658946392db281aa34">More...</a><br /></td></tr>
<tr class="separator:gaf14a3c87b813e9658946392db281aa34"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Present State Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpfc9d026921a51c195645ae62c2864f75"></a>Gives the current status of the host controller Read Only </p>
</td></tr>
<tr class="memitem:ga202c8bc912a7f2b42afdd10887f0c493"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga202c8bc912a7f2b42afdd10887f0c493">XSDPS_PSR_INHIBIT_CMD_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga202c8bc912a7f2b42afdd10887f0c493"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command inhibit - CMD.  <a href="#ga202c8bc912a7f2b42afdd10887f0c493">More...</a><br /></td></tr>
<tr class="separator:ga202c8bc912a7f2b42afdd10887f0c493"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7814152da74fef6a4308ea81908ad0bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga7814152da74fef6a4308ea81908ad0bb">XSDPS_PSR_INHIBIT_DAT_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga7814152da74fef6a4308ea81908ad0bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Inhibit - DAT.  <a href="#ga7814152da74fef6a4308ea81908ad0bb">More...</a><br /></td></tr>
<tr class="separator:ga7814152da74fef6a4308ea81908ad0bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaffd59f40c935ac11c82b090afe90f12c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaffd59f40c935ac11c82b090afe90f12c">XSDPS_PSR_DAT_ACTIVE_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:gaffd59f40c935ac11c82b090afe90f12c"><td class="mdescLeft">&#160;</td><td class="mdescRight">DAT line active.  <a href="#gaffd59f40c935ac11c82b090afe90f12c">More...</a><br /></td></tr>
<tr class="separator:gaffd59f40c935ac11c82b090afe90f12c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad90261cc9ec8c3fa2941ecb3109cfc19"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad90261cc9ec8c3fa2941ecb3109cfc19">XSDPS_PSR_RE_TUNING_REQ_MASK</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:gad90261cc9ec8c3fa2941ecb3109cfc19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Re-tuning request.  <a href="#gad90261cc9ec8c3fa2941ecb3109cfc19">More...</a><br /></td></tr>
<tr class="separator:gad90261cc9ec8c3fa2941ecb3109cfc19"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ca4326266616d0253a9064eca4cbe51"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3ca4326266616d0253a9064eca4cbe51">XSDPS_PSR_WR_ACTIVE_MASK</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:ga3ca4326266616d0253a9064eca4cbe51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write transfer active.  <a href="#ga3ca4326266616d0253a9064eca4cbe51">More...</a><br /></td></tr>
<tr class="separator:ga3ca4326266616d0253a9064eca4cbe51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad7191fb295684001ff129d277151548b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gad7191fb295684001ff129d277151548b">XSDPS_PSR_RD_ACTIVE_MASK</a>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="memdesc:gad7191fb295684001ff129d277151548b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read transfer active.  <a href="#gad7191fb295684001ff129d277151548b">More...</a><br /></td></tr>
<tr class="separator:gad7191fb295684001ff129d277151548b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff86a8ab013da92250fcc5747040c3f8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaff86a8ab013da92250fcc5747040c3f8">XSDPS_PSR_BUFF_WR_EN_MASK</a>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="memdesc:gaff86a8ab013da92250fcc5747040c3f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Buffer write enable.  <a href="#gaff86a8ab013da92250fcc5747040c3f8">More...</a><br /></td></tr>
<tr class="separator:gaff86a8ab013da92250fcc5747040c3f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21b1e1d2f988135ab95198b7f1b38f00"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga21b1e1d2f988135ab95198b7f1b38f00">XSDPS_PSR_BUFF_RD_EN_MASK</a>&#160;&#160;&#160;0x00000800U</td></tr>
<tr class="memdesc:ga21b1e1d2f988135ab95198b7f1b38f00"><td class="mdescLeft">&#160;</td><td class="mdescRight">Buffer read enable.  <a href="#ga21b1e1d2f988135ab95198b7f1b38f00">More...</a><br /></td></tr>
<tr class="separator:ga21b1e1d2f988135ab95198b7f1b38f00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga101467d47c4d7a58b43009892170ce86"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga101467d47c4d7a58b43009892170ce86">XSDPS_PSR_CARD_INSRT_MASK</a>&#160;&#160;&#160;0x00010000U</td></tr>
<tr class="memdesc:ga101467d47c4d7a58b43009892170ce86"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card inserted.  <a href="#ga101467d47c4d7a58b43009892170ce86">More...</a><br /></td></tr>
<tr class="separator:ga101467d47c4d7a58b43009892170ce86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ac2da27df6b90a8ad75cf1bbc309b0a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga7ac2da27df6b90a8ad75cf1bbc309b0a">XSDPS_PSR_CARD_STABLE_MASK</a>&#160;&#160;&#160;0x00020000U</td></tr>
<tr class="memdesc:ga7ac2da27df6b90a8ad75cf1bbc309b0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card state stable.  <a href="#ga7ac2da27df6b90a8ad75cf1bbc309b0a">More...</a><br /></td></tr>
<tr class="separator:ga7ac2da27df6b90a8ad75cf1bbc309b0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabde146f7896b0cf9b576572a17e5fe19"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gabde146f7896b0cf9b576572a17e5fe19">XSDPS_PSR_CARD_DPL_MASK</a>&#160;&#160;&#160;0x00040000U</td></tr>
<tr class="memdesc:gabde146f7896b0cf9b576572a17e5fe19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card detect pin level.  <a href="#gabde146f7896b0cf9b576572a17e5fe19">More...</a><br /></td></tr>
<tr class="separator:gabde146f7896b0cf9b576572a17e5fe19"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb508485d69d735a8d54d7e649eb7e07"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gadb508485d69d735a8d54d7e649eb7e07">XSDPS_PSR_WPS_PL_MASK</a>&#160;&#160;&#160;0x00080000U</td></tr>
<tr class="memdesc:gadb508485d69d735a8d54d7e649eb7e07"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write protect switch pin level.  <a href="#gadb508485d69d735a8d54d7e649eb7e07">More...</a><br /></td></tr>
<tr class="separator:gadb508485d69d735a8d54d7e649eb7e07"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga56a5d17d824207b7f14abc374a7cc081"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga56a5d17d824207b7f14abc374a7cc081">XSDPS_PSR_DAT30_SG_LVL_MASK</a>&#160;&#160;&#160;0x00F00000U</td></tr>
<tr class="memdesc:ga56a5d17d824207b7f14abc374a7cc081"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data 3:0 signal lvl.  <a href="#ga56a5d17d824207b7f14abc374a7cc081">More...</a><br /></td></tr>
<tr class="separator:ga56a5d17d824207b7f14abc374a7cc081"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga30516f53fe6a4fe580039cdb3ad6f0db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga30516f53fe6a4fe580039cdb3ad6f0db">XSDPS_PSR_CMD_SG_LVL_MASK</a>&#160;&#160;&#160;0x01000000U</td></tr>
<tr class="memdesc:ga30516f53fe6a4fe580039cdb3ad6f0db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cmd Line signal lvl.  <a href="#ga30516f53fe6a4fe580039cdb3ad6f0db">More...</a><br /></td></tr>
<tr class="separator:ga30516f53fe6a4fe580039cdb3ad6f0db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2449643d311274c8aec7c0342c341ff9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga2449643d311274c8aec7c0342c341ff9">XSDPS_PSR_DAT74_SG_LVL_MASK</a>&#160;&#160;&#160;0x1E000000U</td></tr>
<tr class="memdesc:ga2449643d311274c8aec7c0342c341ff9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data 7:4 signal lvl.  <a href="#ga2449643d311274c8aec7c0342c341ff9">More...</a><br /></td></tr>
<tr class="separator:ga2449643d311274c8aec7c0342c341ff9"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Maximum Current Capablities Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp6eba5da0fa5831f4ff9a58d91a712268"></a>This register is read only register which contains information about current capabilities at each voltage levels.</p>
<p>Read Only </p>
</td></tr>
<tr class="memitem:gafcee55cb77e32bd74fd4e2be98ac5458"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gafcee55cb77e32bd74fd4e2be98ac5458">XSDPS_MAX_CUR_CAPS_1V8_MASK</a>&#160;&#160;&#160;0x00000F00U</td></tr>
<tr class="memdesc:gafcee55cb77e32bd74fd4e2be98ac5458"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Current Capability at 1.8V.  <a href="#gafcee55cb77e32bd74fd4e2be98ac5458">More...</a><br /></td></tr>
<tr class="separator:gafcee55cb77e32bd74fd4e2be98ac5458"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3af047ba2175efe0ad380766d309586b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3af047ba2175efe0ad380766d309586b">XSDPS_MAX_CUR_CAPS_3V0_MASK</a>&#160;&#160;&#160;0x000000F0U</td></tr>
<tr class="memdesc:ga3af047ba2175efe0ad380766d309586b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Current Capability at 3.0V.  <a href="#ga3af047ba2175efe0ad380766d309586b">More...</a><br /></td></tr>
<tr class="separator:ga3af047ba2175efe0ad380766d309586b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga294b0057bfba29e83c63bc05453eaa50"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga294b0057bfba29e83c63bc05453eaa50">XSDPS_MAX_CUR_CAPS_3V3_MASK</a>&#160;&#160;&#160;0x0000000FU</td></tr>
<tr class="memdesc:ga294b0057bfba29e83c63bc05453eaa50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum Current Capability at 3.3V.  <a href="#ga294b0057bfba29e83c63bc05453eaa50">More...</a><br /></td></tr>
<tr class="separator:ga294b0057bfba29e83c63bc05453eaa50"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Force Event for Auto CMD Error Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp53462f51c3db8cf4ac0e3cab675fdae4"></a>This register is write only register which contains control bits to generate events for Auto CMD error status.</p>
<p>Write Only </p>
</td></tr>
<tr class="memitem:gafbf0816847c780fdad87a70813332d42"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gafbf0816847c780fdad87a70813332d42">XSDPS_FE_AUTO_CMD12_NT_EX_MASK</a>&#160;&#160;&#160;0x0001U</td></tr>
<tr class="memdesc:gafbf0816847c780fdad87a70813332d42"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD12 Not executed.  <a href="#gafbf0816847c780fdad87a70813332d42">More...</a><br /></td></tr>
<tr class="separator:gafbf0816847c780fdad87a70813332d42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5475bd98baa054560f8f361f87b79fd4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga5475bd98baa054560f8f361f87b79fd4">XSDPS_FE_AUTO_CMD_TOUT_MASK</a>&#160;&#160;&#160;0x0002U</td></tr>
<tr class="memdesc:ga5475bd98baa054560f8f361f87b79fd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD Timeout Error.  <a href="#ga5475bd98baa054560f8f361f87b79fd4">More...</a><br /></td></tr>
<tr class="separator:ga5475bd98baa054560f8f361f87b79fd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9bfdf1e2810abdd1b6be67d59caf3c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac9bfdf1e2810abdd1b6be67d59caf3c1">XSDPS_FE_AUTO_CMD_CRC_MASK</a>&#160;&#160;&#160;0x0004U</td></tr>
<tr class="memdesc:gac9bfdf1e2810abdd1b6be67d59caf3c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD CRC Error.  <a href="#gac9bfdf1e2810abdd1b6be67d59caf3c1">More...</a><br /></td></tr>
<tr class="separator:gac9bfdf1e2810abdd1b6be67d59caf3c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadeea93001185e95b88a7603d8b6d357f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gadeea93001185e95b88a7603d8b6d357f">XSDPS_FE_AUTO_CMD_EB_MASK</a>&#160;&#160;&#160;0x0008U</td></tr>
<tr class="memdesc:gadeea93001185e95b88a7603d8b6d357f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD End Bit Error.  <a href="#gadeea93001185e95b88a7603d8b6d357f">More...</a><br /></td></tr>
<tr class="separator:gadeea93001185e95b88a7603d8b6d357f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3d5199bc9bb272601190471d71b0a799"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3d5199bc9bb272601190471d71b0a799">XSDPS_FE_AUTO_CMD_IND_MASK</a>&#160;&#160;&#160;0x0010U</td></tr>
<tr class="memdesc:ga3d5199bc9bb272601190471d71b0a799"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD Index Error.  <a href="#ga3d5199bc9bb272601190471d71b0a799">More...</a><br /></td></tr>
<tr class="separator:ga3d5199bc9bb272601190471d71b0a799"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga933c4fe24bc9da8ea9ae560f64dc0a4c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga933c4fe24bc9da8ea9ae560f64dc0a4c">XSDPS_FE_AUTO_CMD_CNI_ERR_MASK</a>&#160;&#160;&#160;0x0080U</td></tr>
<tr class="memdesc:ga933c4fe24bc9da8ea9ae560f64dc0a4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command not issued by Auto CMD12 Error.  <a href="#ga933c4fe24bc9da8ea9ae560f64dc0a4c">More...</a><br /></td></tr>
<tr class="separator:ga933c4fe24bc9da8ea9ae560f64dc0a4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Force Event for Error Interrupt Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp4e9ffe91377ed494c6f50e9aa69b6f83"></a>This register is write only register which contains control bits to generate events of error interrupt status register.</p>
<p>Write Only </p>
</td></tr>
<tr class="memitem:ga942f66dfaeb4d45d5bfe238d0cb22cd9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga942f66dfaeb4d45d5bfe238d0cb22cd9">XSDPS_FE_INTR_ERR_CT_MASK</a>&#160;&#160;&#160;0x0001U</td></tr>
<tr class="memdesc:ga942f66dfaeb4d45d5bfe238d0cb22cd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Timeout Error.  <a href="#ga942f66dfaeb4d45d5bfe238d0cb22cd9">More...</a><br /></td></tr>
<tr class="separator:ga942f66dfaeb4d45d5bfe238d0cb22cd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3c078ba41d9344d9772f343e6571b840"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga3c078ba41d9344d9772f343e6571b840">XSDPS_FE_INTR_ERR_CCRC_MASK</a>&#160;&#160;&#160;0x0002U</td></tr>
<tr class="memdesc:ga3c078ba41d9344d9772f343e6571b840"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command CRC Error.  <a href="#ga3c078ba41d9344d9772f343e6571b840">More...</a><br /></td></tr>
<tr class="separator:ga3c078ba41d9344d9772f343e6571b840"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9334f240054e1d49f435867900e9ed26"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga9334f240054e1d49f435867900e9ed26">XSDPS_FE_INTR_ERR_CEB_MASK</a>&#160;&#160;&#160;0x0004U</td></tr>
<tr class="memdesc:ga9334f240054e1d49f435867900e9ed26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command End Bit Error.  <a href="#ga9334f240054e1d49f435867900e9ed26">More...</a><br /></td></tr>
<tr class="separator:ga9334f240054e1d49f435867900e9ed26"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga820948cf65ec010bce369853a2d13ccc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga820948cf65ec010bce369853a2d13ccc">XSDPS_FE_INTR_ERR_CI_MASK</a>&#160;&#160;&#160;0x0008U</td></tr>
<tr class="memdesc:ga820948cf65ec010bce369853a2d13ccc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Index Error.  <a href="#ga820948cf65ec010bce369853a2d13ccc">More...</a><br /></td></tr>
<tr class="separator:ga820948cf65ec010bce369853a2d13ccc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1b1d455b484c4b23d50f5fcabd19686e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1b1d455b484c4b23d50f5fcabd19686e">XSDPS_FE_INTR_ERR_DT_MASK</a>&#160;&#160;&#160;0x0010U</td></tr>
<tr class="memdesc:ga1b1d455b484c4b23d50f5fcabd19686e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Timeout Error.  <a href="#ga1b1d455b484c4b23d50f5fcabd19686e">More...</a><br /></td></tr>
<tr class="separator:ga1b1d455b484c4b23d50f5fcabd19686e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga33be277874e3b2de5df2543f4f98b5ee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga33be277874e3b2de5df2543f4f98b5ee">XSDPS_FE_INTR_ERR_DCRC_MASK</a>&#160;&#160;&#160;0x0020U</td></tr>
<tr class="memdesc:ga33be277874e3b2de5df2543f4f98b5ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data CRC Error.  <a href="#ga33be277874e3b2de5df2543f4f98b5ee">More...</a><br /></td></tr>
<tr class="separator:ga33be277874e3b2de5df2543f4f98b5ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaecb185122ce4431bdc1d414aef7c28a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaecb185122ce4431bdc1d414aef7c28a5">XSDPS_FE_INTR_ERR_DEB_MASK</a>&#160;&#160;&#160;0x0040U</td></tr>
<tr class="memdesc:gaecb185122ce4431bdc1d414aef7c28a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data End Bit Error.  <a href="#gaecb185122ce4431bdc1d414aef7c28a5">More...</a><br /></td></tr>
<tr class="separator:gaecb185122ce4431bdc1d414aef7c28a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga644e367fef3279fafbf7582b3ee628b4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga644e367fef3279fafbf7582b3ee628b4">XSDPS_FE_INTR_ERR_CUR_LMT_MASK</a>&#160;&#160;&#160;0x0080U</td></tr>
<tr class="memdesc:ga644e367fef3279fafbf7582b3ee628b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Current Limit Error.  <a href="#ga644e367fef3279fafbf7582b3ee628b4">More...</a><br /></td></tr>
<tr class="separator:ga644e367fef3279fafbf7582b3ee628b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaece41fd1a757cb9834cb7f786169a260"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaece41fd1a757cb9834cb7f786169a260">XSDPS_FE_INTR_ERR_AUTO_CMD_MASK</a>&#160;&#160;&#160;0x0100U</td></tr>
<tr class="memdesc:gaece41fd1a757cb9834cb7f786169a260"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto CMD Error.  <a href="#gaece41fd1a757cb9834cb7f786169a260">More...</a><br /></td></tr>
<tr class="separator:gaece41fd1a757cb9834cb7f786169a260"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fcca79703aebabd0e8e182254120ffe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga7fcca79703aebabd0e8e182254120ffe">XSDPS_FE_INTR_ERR_ADMA_MASK</a>&#160;&#160;&#160;0x0200U</td></tr>
<tr class="memdesc:ga7fcca79703aebabd0e8e182254120ffe"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Error.  <a href="#ga7fcca79703aebabd0e8e182254120ffe">More...</a><br /></td></tr>
<tr class="separator:ga7fcca79703aebabd0e8e182254120ffe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64d782566f6120a2d26559adbb83fd1e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga64d782566f6120a2d26559adbb83fd1e">XSDPS_FE_INTR_ERR_TR_MASK</a>&#160;&#160;&#160;0x1000U</td></tr>
<tr class="memdesc:ga64d782566f6120a2d26559adbb83fd1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Target Reponse.  <a href="#ga64d782566f6120a2d26559adbb83fd1e">More...</a><br /></td></tr>
<tr class="separator:ga64d782566f6120a2d26559adbb83fd1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga470fdd6237f2481fc0110f5e84a2bf89"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga470fdd6237f2481fc0110f5e84a2bf89">XSDPS_FE_INTR_VEND_SPF_ERR_MASK</a>&#160;&#160;&#160;0xE000U</td></tr>
<tr class="memdesc:ga470fdd6237f2481fc0110f5e84a2bf89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vendor Specific Error.  <a href="#ga470fdd6237f2481fc0110f5e84a2bf89">More...</a><br /></td></tr>
<tr class="separator:ga470fdd6237f2481fc0110f5e84a2bf89"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
ADMA Error Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpde3c8edcc0786b579be94da84bf6a599"></a>This register is read only register which contains status information about ADMA errors.</p>
<p>Read Only </p>
</td></tr>
<tr class="memitem:ga745c6eac952b68abb760a5926c01789f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga745c6eac952b68abb760a5926c01789f">XSDPS_ADMA_ERR_MM_LEN_MASK</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga745c6eac952b68abb760a5926c01789f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Length Mismatch Error.  <a href="#ga745c6eac952b68abb760a5926c01789f">More...</a><br /></td></tr>
<tr class="separator:ga745c6eac952b68abb760a5926c01789f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18a886d854dc73476a55dc9b5de19317"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga18a886d854dc73476a55dc9b5de19317">XSDPS_ADMA_ERR_STATE_MASK</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:ga18a886d854dc73476a55dc9b5de19317"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Error State.  <a href="#ga18a886d854dc73476a55dc9b5de19317">More...</a><br /></td></tr>
<tr class="separator:ga18a886d854dc73476a55dc9b5de19317"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga69feeb0ca76ab7c342744f4c17c3b1ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga69feeb0ca76ab7c342744f4c17c3b1ad">XSDPS_ADMA_ERR_STATE_STOP_MASK</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:ga69feeb0ca76ab7c342744f4c17c3b1ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Error State STOP.  <a href="#ga69feeb0ca76ab7c342744f4c17c3b1ad">More...</a><br /></td></tr>
<tr class="separator:ga69feeb0ca76ab7c342744f4c17c3b1ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d9d6ab2c17208f9e56faf70886ef7e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga1d9d6ab2c17208f9e56faf70886ef7e0">XSDPS_ADMA_ERR_STATE_FDS_MASK</a>&#160;&#160;&#160;0x01U</td></tr>
<tr class="memdesc:ga1d9d6ab2c17208f9e56faf70886ef7e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Error State FDS.  <a href="#ga1d9d6ab2c17208f9e56faf70886ef7e0">More...</a><br /></td></tr>
<tr class="separator:ga1d9d6ab2c17208f9e56faf70886ef7e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeca6dccb00671ee51069716350cd2b9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaeca6dccb00671ee51069716350cd2b9a">XSDPS_ADMA_ERR_STATE_TFR_MASK</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:gaeca6dccb00671ee51069716350cd2b9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">ADMA Error State TFR.  <a href="#gaeca6dccb00671ee51069716350cd2b9a">More...</a><br /></td></tr>
<tr class="separator:gaeca6dccb00671ee51069716350cd2b9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Preset Values Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpc6e9e656f908c24cb4374c3819fcbb30"></a>This register is read only register which contains preset values for each of speed modes.</p>
<p>Read Only </p>
</td></tr>
<tr class="memitem:ga0c8955eab471574a4284010f44691a65"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga0c8955eab471574a4284010f44691a65">XSDPS_PRE_VAL_SDCLK_FSEL_MASK</a>&#160;&#160;&#160;0x03FFU</td></tr>
<tr class="memdesc:ga0c8955eab471574a4284010f44691a65"><td class="mdescLeft">&#160;</td><td class="mdescRight">SDCLK Frequency Select Value.  <a href="#ga0c8955eab471574a4284010f44691a65">More...</a><br /></td></tr>
<tr class="separator:ga0c8955eab471574a4284010f44691a65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8967bcc25fbea6d46521b28db3afd9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gac8967bcc25fbea6d46521b28db3afd9d">XSDPS_PRE_VAL_CLK_GEN_SEL_MASK</a>&#160;&#160;&#160;0x0400U</td></tr>
<tr class="memdesc:gac8967bcc25fbea6d46521b28db3afd9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock Generator Mode Select.  <a href="#gac8967bcc25fbea6d46521b28db3afd9d">More...</a><br /></td></tr>
<tr class="separator:gac8967bcc25fbea6d46521b28db3afd9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga00a11d17ff0271f58f9f4bca9110d077"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga00a11d17ff0271f58f9f4bca9110d077">XSDPS_PRE_VAL_DRV_STR_SEL_MASK</a>&#160;&#160;&#160;0xC000U</td></tr>
<tr class="memdesc:ga00a11d17ff0271f58f9f4bca9110d077"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength Select Value.  <a href="#ga00a11d17ff0271f58f9f4bca9110d077">More...</a><br /></td></tr>
<tr class="separator:ga00a11d17ff0271f58f9f4bca9110d077"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Slot Interrupt Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp31ec67c6a215a01fb8a2c0b1e6264678"></a>This register is read only register which contains interrupt slot signal for each slot.</p>
<p>Read Only </p>
</td></tr>
<tr class="memitem:gab48f3cb96498fbb0d844ee725b296231"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gab48f3cb96498fbb0d844ee725b296231">XSDPS_SLOT_INTR_STS_INT_MASK</a>&#160;&#160;&#160;0x0007U</td></tr>
<tr class="memdesc:gab48f3cb96498fbb0d844ee725b296231"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Signal mask.  <a href="#gab48f3cb96498fbb0d844ee725b296231">More...</a><br /></td></tr>
<tr class="separator:gab48f3cb96498fbb0d844ee725b296231"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Host Controller Version Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp7889b180be9570b1c84ca7e40434d9db"></a>This register is read only register which contains Host Controller and Vendor Specific version.</p>
<p>Read Only </p>
</td></tr>
<tr class="memitem:ga24d5110ca34a796772f5414becf30cef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#ga24d5110ca34a796772f5414becf30cef">XSDPS_HC_VENDOR_VER</a>&#160;&#160;&#160;0xFF00U</td></tr>
<tr class="memdesc:ga24d5110ca34a796772f5414becf30cef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vendor Specification version mask.  <a href="#ga24d5110ca34a796772f5414becf30cef">More...</a><br /></td></tr>
<tr class="separator:ga24d5110ca34a796772f5414becf30cef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa173508eec0c07f8dc79e46c54a2e45d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sdps__v2__5.html#gaa173508eec0c07f8dc79e46c54a2e45d">XSDPS_HC_SPEC_VER_MASK</a>&#160;&#160;&#160;0x00FFU</td></tr>
<tr class="memdesc:gaa173508eec0c07f8dc79e46c54a2e45d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Host Specification version mask.  <a href="#gaa173508eec0c07f8dc79e46c54a2e45d">More...</a><br /></td></tr>
<tr class="separator:gaa173508eec0c07f8dc79e46c54a2e45d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf0c9fa3b57774df749a7a6e204c2c1ca"><td class="memItemLeft" align="right" valign="top"><a id="gaf0c9fa3b57774df749a7a6e204c2c1ca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_HC_SPEC_V3</b>&#160;&#160;&#160;0x0002U</td></tr>
<tr class="separator:gaf0c9fa3b57774df749a7a6e204c2c1ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86a0db09d2f88a32cc8ea4a08057a5fb"><td class="memItemLeft" align="right" valign="top"><a id="ga86a0db09d2f88a32cc8ea4a08057a5fb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_HC_SPEC_V2</b>&#160;&#160;&#160;0x0001U</td></tr>
<tr class="separator:ga86a0db09d2f88a32cc8ea4a08057a5fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed58d5a6e110e38ab853797e415b4569"><td class="memItemLeft" align="right" valign="top"><a id="gaed58d5a6e110e38ab853797e415b4569"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_HC_SPEC_V1</b>&#160;&#160;&#160;0x0000U</td></tr>
<tr class="separator:gaed58d5a6e110e38ab853797e415b4569"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Block size mask for 512 bytes</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpb2c8055e58ef61c9cdf4351dcc557670"></a>Block size mask for 512 bytes - This is the default block size. </p>
</td></tr>
<tr class="memitem:ga893a5ec77671176e84b4885113db80f5"><td class="memItemLeft" align="right" valign="top"><a id="ga893a5ec77671176e84b4885113db80f5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_BLK_SIZE_512_MASK</b>&#160;&#160;&#160;0x200U</td></tr>
<tr class="separator:ga893a5ec77671176e84b4885113db80f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Commands</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpc441ee50c88f6e5e3a7c69fc69dad8b8"></a>Constant definitions for commands and response related to SD </p>
</td></tr>
<tr class="memitem:ga172481060db6900cd712cebfeadbb8fd"><td class="memItemLeft" align="right" valign="top"><a id="ga172481060db6900cd712cebfeadbb8fd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSDPS_APP_CMD_PREFIX</b>&#160;&#160;&#160;0x8000U</td></tr>
<tr class="separator:ga172481060db6900cd712cebfeadbb8fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga938c1466755f12fb04ac0d1b775584d1"><td class="memItemLeft" align="right" valign="top"><a id="ga938c1466755f12fb04ac0d1b775584d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD0</b>&#160;&#160;&#160;0x0000U</td></tr>
<tr class="separator:ga938c1466755f12fb04ac0d1b775584d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca9979f299fa78c1128d778084478673"><td class="memItemLeft" align="right" valign="top"><a id="gaca9979f299fa78c1128d778084478673"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD1</b>&#160;&#160;&#160;0x0100U</td></tr>
<tr class="separator:gaca9979f299fa78c1128d778084478673"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc5c4b6ab1c918966cbd02b1a7d9d68c"><td class="memItemLeft" align="right" valign="top"><a id="gafc5c4b6ab1c918966cbd02b1a7d9d68c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD2</b>&#160;&#160;&#160;0x0200U</td></tr>
<tr class="separator:gafc5c4b6ab1c918966cbd02b1a7d9d68c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga130f4c4e31a70d8f61750a581687e39a"><td class="memItemLeft" align="right" valign="top"><a id="ga130f4c4e31a70d8f61750a581687e39a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD3</b>&#160;&#160;&#160;0x0300U</td></tr>
<tr class="separator:ga130f4c4e31a70d8f61750a581687e39a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga096675dbae532a107dd5f638993a1f67"><td class="memItemLeft" align="right" valign="top"><a id="ga096675dbae532a107dd5f638993a1f67"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD4</b>&#160;&#160;&#160;0x0400U</td></tr>
<tr class="separator:ga096675dbae532a107dd5f638993a1f67"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf1f24155531bae5091603a273a426437"><td class="memItemLeft" align="right" valign="top"><a id="gaf1f24155531bae5091603a273a426437"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD5</b>&#160;&#160;&#160;0x0500U</td></tr>
<tr class="separator:gaf1f24155531bae5091603a273a426437"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f99cc8c10435831e23c0e7923445bba"><td class="memItemLeft" align="right" valign="top"><a id="ga8f99cc8c10435831e23c0e7923445bba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD6</b>&#160;&#160;&#160;0x0600U</td></tr>
<tr class="separator:ga8f99cc8c10435831e23c0e7923445bba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0919b41fdc4caf312e733ecdee0a1e46"><td class="memItemLeft" align="right" valign="top"><a id="ga0919b41fdc4caf312e733ecdee0a1e46"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ACMD6</b>&#160;&#160;&#160;(XSDPS_APP_CMD_PREFIX + 0x0600U)</td></tr>
<tr class="separator:ga0919b41fdc4caf312e733ecdee0a1e46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d3c60653ad9483b8f3d276cc838a3c9"><td class="memItemLeft" align="right" valign="top"><a id="ga8d3c60653ad9483b8f3d276cc838a3c9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD7</b>&#160;&#160;&#160;0x0700U</td></tr>
<tr class="separator:ga8d3c60653ad9483b8f3d276cc838a3c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac75b3e0ad1fb013ea946fb49bbe65668"><td class="memItemLeft" align="right" valign="top"><a id="gac75b3e0ad1fb013ea946fb49bbe65668"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD8</b>&#160;&#160;&#160;0x0800U</td></tr>
<tr class="separator:gac75b3e0ad1fb013ea946fb49bbe65668"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1fac6a251d7e7dc204d21639bf521459"><td class="memItemLeft" align="right" valign="top"><a id="ga1fac6a251d7e7dc204d21639bf521459"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD9</b>&#160;&#160;&#160;0x0900U</td></tr>
<tr class="separator:ga1fac6a251d7e7dc204d21639bf521459"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7b800ed8e7bd52e6f570a5ce72b8104"><td class="memItemLeft" align="right" valign="top"><a id="gae7b800ed8e7bd52e6f570a5ce72b8104"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD10</b>&#160;&#160;&#160;0x0A00U</td></tr>
<tr class="separator:gae7b800ed8e7bd52e6f570a5ce72b8104"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf6aa8edd1a1d6ca68d5ca6e3e2ebe1f8"><td class="memItemLeft" align="right" valign="top"><a id="gaf6aa8edd1a1d6ca68d5ca6e3e2ebe1f8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD11</b>&#160;&#160;&#160;0x0B00U</td></tr>
<tr class="separator:gaf6aa8edd1a1d6ca68d5ca6e3e2ebe1f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d6283c9b060afbaa0e6d1ff7e5ea7b8"><td class="memItemLeft" align="right" valign="top"><a id="ga8d6283c9b060afbaa0e6d1ff7e5ea7b8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD12</b>&#160;&#160;&#160;0x0C00U</td></tr>
<tr class="separator:ga8d6283c9b060afbaa0e6d1ff7e5ea7b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4be8f501d86d24b02923846db618fc71"><td class="memItemLeft" align="right" valign="top"><a id="ga4be8f501d86d24b02923846db618fc71"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ACMD13</b>&#160;&#160;&#160;(XSDPS_APP_CMD_PREFIX + 0x0D00U)</td></tr>
<tr class="separator:ga4be8f501d86d24b02923846db618fc71"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaeab261b94f2031ba41a1d4d857c3541"><td class="memItemLeft" align="right" valign="top"><a id="gaaeab261b94f2031ba41a1d4d857c3541"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD16</b>&#160;&#160;&#160;0x1000U</td></tr>
<tr class="separator:gaaeab261b94f2031ba41a1d4d857c3541"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6bbfe7dc16a19b7f40efcf554b5666ad"><td class="memItemLeft" align="right" valign="top"><a id="ga6bbfe7dc16a19b7f40efcf554b5666ad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD17</b>&#160;&#160;&#160;0x1100U</td></tr>
<tr class="separator:ga6bbfe7dc16a19b7f40efcf554b5666ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3d32c27a6be061b865ba539127278f14"><td class="memItemLeft" align="right" valign="top"><a id="ga3d32c27a6be061b865ba539127278f14"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD18</b>&#160;&#160;&#160;0x1200U</td></tr>
<tr class="separator:ga3d32c27a6be061b865ba539127278f14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2647d51b93b3496ecf97f0410f44bef3"><td class="memItemLeft" align="right" valign="top"><a id="ga2647d51b93b3496ecf97f0410f44bef3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD19</b>&#160;&#160;&#160;0x1300U</td></tr>
<tr class="separator:ga2647d51b93b3496ecf97f0410f44bef3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1839f1a861812310886ef7656ff606c"><td class="memItemLeft" align="right" valign="top"><a id="gac1839f1a861812310886ef7656ff606c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD21</b>&#160;&#160;&#160;0x1500U</td></tr>
<tr class="separator:gac1839f1a861812310886ef7656ff606c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14506e981f38b6177bc36f72c2ca18b1"><td class="memItemLeft" align="right" valign="top"><a id="ga14506e981f38b6177bc36f72c2ca18b1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD23</b>&#160;&#160;&#160;0x1700U</td></tr>
<tr class="separator:ga14506e981f38b6177bc36f72c2ca18b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa38144d651e2880f92c65bb683621f78"><td class="memItemLeft" align="right" valign="top"><a id="gaa38144d651e2880f92c65bb683621f78"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ACMD23</b>&#160;&#160;&#160;(XSDPS_APP_CMD_PREFIX + 0x1700U)</td></tr>
<tr class="separator:gaa38144d651e2880f92c65bb683621f78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga252300302c6f7960df547a7f5c25be85"><td class="memItemLeft" align="right" valign="top"><a id="ga252300302c6f7960df547a7f5c25be85"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD24</b>&#160;&#160;&#160;0x1800U</td></tr>
<tr class="separator:ga252300302c6f7960df547a7f5c25be85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaee2c673fba987178f4642531fdeefe9e"><td class="memItemLeft" align="right" valign="top"><a id="gaee2c673fba987178f4642531fdeefe9e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD25</b>&#160;&#160;&#160;0x1900U</td></tr>
<tr class="separator:gaee2c673fba987178f4642531fdeefe9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ca1450d0ac55d2705aab03537bf2865"><td class="memItemLeft" align="right" valign="top"><a id="ga3ca1450d0ac55d2705aab03537bf2865"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD41</b>&#160;&#160;&#160;0x2900U</td></tr>
<tr class="separator:ga3ca1450d0ac55d2705aab03537bf2865"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b6fdfed1b57ac31269b6b9987e0761b"><td class="memItemLeft" align="right" valign="top"><a id="ga9b6fdfed1b57ac31269b6b9987e0761b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ACMD41</b>&#160;&#160;&#160;(XSDPS_APP_CMD_PREFIX + 0x2900U)</td></tr>
<tr class="separator:ga9b6fdfed1b57ac31269b6b9987e0761b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a05cade76424935afd02e8a6ab5e7d3"><td class="memItemLeft" align="right" valign="top"><a id="ga0a05cade76424935afd02e8a6ab5e7d3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ACMD42</b>&#160;&#160;&#160;(XSDPS_APP_CMD_PREFIX + 0x2A00U)</td></tr>
<tr class="separator:ga0a05cade76424935afd02e8a6ab5e7d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga792c3b3cd9ca138ba676a4bf48bb2623"><td class="memItemLeft" align="right" valign="top"><a id="ga792c3b3cd9ca138ba676a4bf48bb2623"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ACMD51</b>&#160;&#160;&#160;(XSDPS_APP_CMD_PREFIX + 0x3300U)</td></tr>
<tr class="separator:ga792c3b3cd9ca138ba676a4bf48bb2623"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf9a0a4575ef1e94446e8ef6d69120081"><td class="memItemLeft" align="right" valign="top"><a id="gaf9a0a4575ef1e94446e8ef6d69120081"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD52</b>&#160;&#160;&#160;0x3400U</td></tr>
<tr class="separator:gaf9a0a4575ef1e94446e8ef6d69120081"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga78289a7a85ffcfddd626694105dc0780"><td class="memItemLeft" align="right" valign="top"><a id="ga78289a7a85ffcfddd626694105dc0780"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD55</b>&#160;&#160;&#160;0x3700U</td></tr>
<tr class="separator:ga78289a7a85ffcfddd626694105dc0780"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7a26b2cf17e1ff5967820a1fa41a7aa"><td class="memItemLeft" align="right" valign="top"><a id="gaa7a26b2cf17e1ff5967820a1fa41a7aa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMD58</b>&#160;&#160;&#160;0x3A00U</td></tr>
<tr class="separator:gaa7a26b2cf17e1ff5967820a1fa41a7aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3575d79f40b537792c910be8087683a"><td class="memItemLeft" align="right" valign="top"><a id="gac3575d79f40b537792c910be8087683a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RESP_NONE</b>&#160;&#160;&#160;(u32)<a class="el" href="group__sdps__v2__5.html#ga62463cbd471c830c64acf7d4ab41d76b">XSDPS_CMD_RESP_NONE_MASK</a></td></tr>
<tr class="separator:gac3575d79f40b537792c910be8087683a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4663d55a6a55c048b8fa4c8c3b174b81"><td class="memItemLeft" align="right" valign="top"><a id="ga4663d55a6a55c048b8fa4c8c3b174b81"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RESP_R1</b></td></tr>
<tr class="separator:ga4663d55a6a55c048b8fa4c8c3b174b81"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3fbefb428c9ad42ac1a24f2444035b77"><td class="memItemLeft" align="right" valign="top"><a id="ga3fbefb428c9ad42ac1a24f2444035b77"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RESP_R1B</b></td></tr>
<tr class="separator:ga3fbefb428c9ad42ac1a24f2444035b77"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab089c8ca6fe141061d6af64562a982fd"><td class="memItemLeft" align="right" valign="top"><a id="gab089c8ca6fe141061d6af64562a982fd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RESP_R2</b>&#160;&#160;&#160;(u32)<a class="el" href="group__sdps__v2__5.html#gafe5eec57bcd6cf8469b33aa6da746761">XSDPS_CMD_RESP_L136_MASK</a> | (u32)<a class="el" href="group__sdps__v2__5.html#ga1371f2d04ef2229cb465eb578b506e40">XSDPS_CMD_CRC_CHK_EN_MASK</a></td></tr>
<tr class="separator:gab089c8ca6fe141061d6af64562a982fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabe31a03748d5510551d8665c07d01cbf"><td class="memItemLeft" align="right" valign="top"><a id="gabe31a03748d5510551d8665c07d01cbf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RESP_R3</b>&#160;&#160;&#160;(u32)<a class="el" href="group__sdps__v2__5.html#gab1cb6a89e3d65cdd481cf4f6e5238653">XSDPS_CMD_RESP_L48_MASK</a></td></tr>
<tr class="separator:gabe31a03748d5510551d8665c07d01cbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a17d6ef34597a295b0565d0f1be20d0"><td class="memItemLeft" align="right" valign="top"><a id="ga2a17d6ef34597a295b0565d0f1be20d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RESP_R6</b></td></tr>
<tr class="separator:ga2a17d6ef34597a295b0565d0f1be20d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="gaf7596df11ad001d37fd1f4482a817270"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf7596df11ad001d37fd1f4482a817270">&#9670;&nbsp;</a></span>MAX_TUNING_COUNT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define MAX_TUNING_COUNT&#160;&#160;&#160;40U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>Maximum Tuning count. </p>

</div>
</div>
<a id="ga745c6eac952b68abb760a5926c01789f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga745c6eac952b68abb760a5926c01789f">&#9670;&nbsp;</a></span>XSDPS_ADMA_ERR_MM_LEN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_ERR_MM_LEN_MASK&#160;&#160;&#160;0x04U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Length Mismatch Error. </p>

</div>
</div>
<a id="ga1d9d6ab2c17208f9e56faf70886ef7e0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1d9d6ab2c17208f9e56faf70886ef7e0">&#9670;&nbsp;</a></span>XSDPS_ADMA_ERR_STATE_FDS_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_ERR_STATE_FDS_MASK&#160;&#160;&#160;0x01U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Error State FDS. </p>

</div>
</div>
<a id="ga18a886d854dc73476a55dc9b5de19317"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga18a886d854dc73476a55dc9b5de19317">&#9670;&nbsp;</a></span>XSDPS_ADMA_ERR_STATE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_ERR_STATE_MASK&#160;&#160;&#160;0x03U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Error State. </p>

</div>
</div>
<a id="ga69feeb0ca76ab7c342744f4c17c3b1ad"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga69feeb0ca76ab7c342744f4c17c3b1ad">&#9670;&nbsp;</a></span>XSDPS_ADMA_ERR_STATE_STOP_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_ERR_STATE_STOP_MASK&#160;&#160;&#160;0x00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Error State STOP. </p>

</div>
</div>
<a id="gaeca6dccb00671ee51069716350cd2b9a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaeca6dccb00671ee51069716350cd2b9a">&#9670;&nbsp;</a></span>XSDPS_ADMA_ERR_STATE_TFR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_ERR_STATE_TFR_MASK&#160;&#160;&#160;0x03U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Error State TFR. </p>

</div>
</div>
<a id="ga8596f558d715af3bce27d0b872228973"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8596f558d715af3bce27d0b872228973">&#9670;&nbsp;</a></span>XSDPS_ADMA_ERR_STS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_ERR_STS_OFFSET&#160;&#160;&#160;0x54U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Error Status Register. </p>

</div>
</div>
<a id="gab775116938341d21b9796ffae03fdd10"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab775116938341d21b9796ffae03fdd10">&#9670;&nbsp;</a></span>XSDPS_ADMA_SAR_EXT_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_SAR_EXT_OFFSET&#160;&#160;&#160;0x5CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA System Address Extended Register. </p>

</div>
</div>
<a id="gae96828d548d3bdb30ed057eb0bdc8be1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae96828d548d3bdb30ed057eb0bdc8be1">&#9670;&nbsp;</a></span>XSDPS_ADMA_SAR_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ADMA_SAR_OFFSET&#160;&#160;&#160;0x58U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA System Address Register. </p>

</div>
</div>
<a id="gad4eb2208d36f4345d4020e03a75a8941"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad4eb2208d36f4345d4020e03a75a8941">&#9670;&nbsp;</a></span>XSDPS_ARGMT1_HI_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ARGMT1_HI_OFFSET&#160;&#160;&#160;0x0AU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Argument1 Register. </p>

</div>
</div>
<a id="ga17c5f8c14aa76a9a827bf742f2ae4ac5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga17c5f8c14aa76a9a827bf742f2ae4ac5">&#9670;&nbsp;</a></span>XSDPS_ARGMT1_LO_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ARGMT1_LO_OFFSET&#160;&#160;&#160;<a class="el" href="group__sdps__v2__5.html#ga0f629f596d2bcbdac2d2064dd834222e">XSDPS_ARGMT_OFFSET</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Argument1 Register. </p>

</div>
</div>
<a id="gab32ab9880169b81e5ab9d35524288607"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab32ab9880169b81e5ab9d35524288607">&#9670;&nbsp;</a></span>XSDPS_ARGMT2_HI_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ARGMT2_HI_OFFSET&#160;&#160;&#160;0x02U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Argument2 High Register. </p>

</div>
</div>
<a id="ga43426e7ab84285b4c72a206205564202"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga43426e7ab84285b4c72a206205564202">&#9670;&nbsp;</a></span>XSDPS_ARGMT2_LO_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ARGMT2_LO_OFFSET&#160;&#160;&#160;0x00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Argument2 Low Register. </p>

</div>
</div>
<a id="ga0f629f596d2bcbdac2d2064dd834222e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0f629f596d2bcbdac2d2064dd834222e">&#9670;&nbsp;</a></span>XSDPS_ARGMT_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ARGMT_OFFSET&#160;&#160;&#160;0x08U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Argument Register. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="gac3838e63e18b0a9e4e629ed93b38ac92"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac3838e63e18b0a9e4e629ed93b38ac92">&#9670;&nbsp;</a></span>XSDPS_AUTO_CMD12_ERR_STS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_AUTO_CMD12_ERR_STS_OFFSET&#160;&#160;&#160;0x3CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD12 Error Status Register. </p>

</div>
</div>
<a id="ga447fb2a75530d416f83d811f94da248e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga447fb2a75530d416f83d811f94da248e">&#9670;&nbsp;</a></span>XSDPS_AUTO_CMD12_NT_EX_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_AUTO_CMD12_NT_EX_MASK&#160;&#160;&#160;0x0001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD12 Not executed. </p>

</div>
</div>
<a id="gadbc1089a0e07fe03b441d7224eba5c10"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadbc1089a0e07fe03b441d7224eba5c10">&#9670;&nbsp;</a></span>XSDPS_AUTO_CMD_CNI_ERR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_AUTO_CMD_CNI_ERR_MASK&#160;&#160;&#160;0x0080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command not issued by Auto CMD12 Error. </p>

</div>
</div>
<a id="ga38d51bdd8a0211a3b9fef58b273f1110"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga38d51bdd8a0211a3b9fef58b273f1110">&#9670;&nbsp;</a></span>XSDPS_AUTO_CMD_CRC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_AUTO_CMD_CRC_MASK&#160;&#160;&#160;0x0004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD CRC Error. </p>

</div>
</div>
<a id="ga56e320482742e6a619a2aa42b294f860"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga56e320482742e6a619a2aa42b294f860">&#9670;&nbsp;</a></span>XSDPS_AUTO_CMD_EB_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_AUTO_CMD_EB_MASK&#160;&#160;&#160;0x0008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD End Bit Error. </p>

</div>
</div>
<a id="gac39616d27b0373ada7d57f69fa96b235"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac39616d27b0373ada7d57f69fa96b235">&#9670;&nbsp;</a></span>XSDPS_AUTO_CMD_IND_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_AUTO_CMD_IND_MASK&#160;&#160;&#160;0x0010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD Index Error. </p>

</div>
</div>
<a id="gae60ddda28770340f4190c68b21d7f6a9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae60ddda28770340f4190c68b21d7f6a9">&#9670;&nbsp;</a></span>XSDPS_AUTO_CMD_TOUT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_AUTO_CMD_TOUT_MASK&#160;&#160;&#160;0x0002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD Timeout Error. </p>

</div>
</div>
<a id="ga311eef2831397adc78fd07e691aee110"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga311eef2831397adc78fd07e691aee110">&#9670;&nbsp;</a></span>XSDPS_BGC_ALT_BOOT_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_ALT_BOOT_EN_MASK&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Alt BootEn. </p>

</div>
</div>
<a id="ga0a82c37d5d1777917c976a760d5d9c96"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0a82c37d5d1777917c976a760d5d9c96">&#9670;&nbsp;</a></span>XSDPS_BGC_BOOT_ACK_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_BOOT_ACK_MASK&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Boot Ack. </p>

</div>
</div>
<a id="gabfd011a8a9c0c2473781fe53f9eda19e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabfd011a8a9c0c2473781fe53f9eda19e">&#9670;&nbsp;</a></span>XSDPS_BGC_BOOT_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_BOOT_EN_MASK&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Boot Enb. </p>

</div>
</div>
<a id="ga4a892bcb6ad14e6b7c462bf6f05210e1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4a892bcb6ad14e6b7c462bf6f05210e1">&#9670;&nbsp;</a></span>XSDPS_BGC_CNT_REQ_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_CNT_REQ_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Cont Req. </p>

</div>
</div>
<a id="ga27992b5760be2e85951e69f64c988834"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga27992b5760be2e85951e69f64c988834">&#9670;&nbsp;</a></span>XSDPS_BGC_INTR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_INTR_MASK&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Intr. </p>

</div>
</div>
<a id="gab9b662718ec0b7259d9322d4b02eab4f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab9b662718ec0b7259d9322d4b02eab4f">&#9670;&nbsp;</a></span>XSDPS_BGC_RWC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_RWC_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Rd Wait. </p>

</div>
</div>
<a id="ga1e4b1b1e81e201f881acbc87899fd756"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1e4b1b1e81e201f881acbc87899fd756">&#9670;&nbsp;</a></span>XSDPS_BGC_SPI_MODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_SPI_MODE_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap SPI Mode. </p>

</div>
</div>
<a id="gababf16747192f5f824455c7cf80e902c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gababf16747192f5f824455c7cf80e902c">&#9670;&nbsp;</a></span>XSDPS_BGC_STP_REQ_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BGC_STP_REQ_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Stop Req. </p>

</div>
</div>
<a id="ga396934244c45cbed279c43b9abadc7f9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga396934244c45cbed279c43b9abadc7f9">&#9670;&nbsp;</a></span>XSDPS_BLK_CNT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BLK_CNT_MASK&#160;&#160;&#160;0x0000FFFFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Count for Current Transfer. </p>

</div>
</div>
<a id="gae0c324dd75ec228b0f7983f227202675"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae0c324dd75ec228b0f7983f227202675">&#9670;&nbsp;</a></span>XSDPS_BLK_CNT_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BLK_CNT_OFFSET&#160;&#160;&#160;0x06U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Count Register. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="ga647487649c8822942fb3c84404780047"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga647487649c8822942fb3c84404780047">&#9670;&nbsp;</a></span>XSDPS_BLK_GAP_CTRL_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BLK_GAP_CTRL_OFFSET&#160;&#160;&#160;0x2AU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Control. </p>

</div>
</div>
<a id="gaa50e45067119d5516ebd171efc11bdf1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa50e45067119d5516ebd171efc11bdf1">&#9670;&nbsp;</a></span>XSDPS_BLK_SIZE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BLK_SIZE_MASK&#160;&#160;&#160;0x00000FFFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Transfer Block Size. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#gaf9b8a29b65e1213b11ad22312e5f84be">XSdPs_SetupADMA2DescTbl()</a>.</p>

</div>
</div>
<a id="ga056c8c37db130b3e8f553e38190e4578"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga056c8c37db130b3e8f553e38190e4578">&#9670;&nbsp;</a></span>XSDPS_BLK_SIZE_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BLK_SIZE_OFFSET&#160;&#160;&#160;0x04U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Size Register. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#gaf9b8a29b65e1213b11ad22312e5f84be">XSdPs_SetupADMA2DescTbl()</a>.</p>

</div>
</div>
<a id="ga36a776897478c7698016a45da34c34d6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga36a776897478c7698016a45da34c34d6">&#9670;&nbsp;</a></span>XSDPS_BOOT_TOUT_CTRL_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BOOT_TOUT_CTRL_OFFSET&#160;&#160;&#160;0x70U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Boot timeout control register. </p>

</div>
</div>
<a id="gab55ec1197863796be4260591af2fcc13"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab55ec1197863796be4260591af2fcc13">&#9670;&nbsp;</a></span>XSDPS_BUF_DAT_PORT_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_BUF_DAT_PORT_OFFSET&#160;&#160;&#160;0x20U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Buffer Data Port. </p>

</div>
</div>
<a id="gaca16f624866b2ccde47ea963eae8283e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaca16f624866b2ccde47ea963eae8283e">&#9670;&nbsp;</a></span>XSDPS_CAP_ADMA2_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_ADMA2_MASK&#160;&#160;&#160;0x00080000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA2 support. </p>

</div>
</div>
<a id="gaac9eea775c118859d00d475f7d226951"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaac9eea775c118859d00d475f7d226951">&#9670;&nbsp;</a></span>XSDPS_CAP_EXT_MEDIA_BUS_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_EXT_MEDIA_BUS_MASK&#160;&#160;&#160;0x00040000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Extended media bus. </p>

</div>
</div>
<a id="ga209f2596b4c455d08de11f26320d398d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga209f2596b4c455d08de11f26320d398d">&#9670;&nbsp;</a></span>XSDPS_CAP_HIGH_SPEED_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_HIGH_SPEED_MASK&#160;&#160;&#160;0x00200000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>High speed support. </p>

</div>
</div>
<a id="ga1dfb0f0abec6b472e9905f4c19b6f60e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1dfb0f0abec6b472e9905f4c19b6f60e">&#9670;&nbsp;</a></span>XSDPS_CAP_INTR_MODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_INTR_MODE_MASK&#160;&#160;&#160;0x08000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Interrupt mode support. </p>

</div>
</div>
<a id="ga5067222814c18b97f99d595e997ee0bf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5067222814c18b97f99d595e997ee0bf">&#9670;&nbsp;</a></span>XSDPS_CAP_MAX_BL_LN_1024_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_MAX_BL_LN_1024_MASK&#160;&#160;&#160;0x00010000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Max block 1024 bytes. </p>

</div>
</div>
<a id="gadd23e275b15c0f7bc8afbec7a168e1b4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadd23e275b15c0f7bc8afbec7a168e1b4">&#9670;&nbsp;</a></span>XSDPS_CAP_MAX_BL_LN_2048_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_MAX_BL_LN_2048_MASK&#160;&#160;&#160;0x00020000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Max block 2048 bytes. </p>

</div>
</div>
<a id="ga6d1cc3e8e55cc7d3b8e23963a642728d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6d1cc3e8e55cc7d3b8e23963a642728d">&#9670;&nbsp;</a></span>XSDPS_CAP_MAX_BL_LN_4096_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_MAX_BL_LN_4096_MASK&#160;&#160;&#160;0x00030000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Max block 4096 bytes. </p>

</div>
</div>
<a id="gab7a95db0b6370a5f9e8c1ac1979ba4f7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab7a95db0b6370a5f9e8c1ac1979ba4f7">&#9670;&nbsp;</a></span>XSDPS_CAP_MAX_BLK_LEN_512B_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_MAX_BLK_LEN_512B_MASK&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Max block 512 bytes. </p>

</div>
</div>
<a id="ga6a4730dbebc21ca61352252cbae7491f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6a4730dbebc21ca61352252cbae7491f">&#9670;&nbsp;</a></span>XSDPS_CAP_MAX_BLK_LEN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_MAX_BLK_LEN_MASK&#160;&#160;&#160;0x00030000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Max block length. </p>

</div>
</div>
<a id="ga655f8c389059796e5527f68c56421309"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga655f8c389059796e5527f68c56421309">&#9670;&nbsp;</a></span>XSDPS_CAP_SDMA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_SDMA_MASK&#160;&#160;&#160;0x00400000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDMA support. </p>

</div>
</div>
<a id="ga57b628afa64227b4ded9fbdb100be7bb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga57b628afa64227b4ded9fbdb100be7bb">&#9670;&nbsp;</a></span>XSDPS_CAP_SPI_BLOCK_MODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_SPI_BLOCK_MODE_MASK&#160;&#160;&#160;0x40000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SPI block mode. </p>

</div>
</div>
<a id="gac6e0e5e022e0172428ee6c91327b42a5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac6e0e5e022e0172428ee6c91327b42a5">&#9670;&nbsp;</a></span>XSDPS_CAP_SPI_MODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_SPI_MODE_MASK&#160;&#160;&#160;0x20000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SPI mode. </p>

</div>
</div>
<a id="ga8bd1237a7e611d6e00301344d79e1fc1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8bd1237a7e611d6e00301344d79e1fc1">&#9670;&nbsp;</a></span>XSDPS_CAP_SUSP_RESUME_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_SUSP_RESUME_MASK&#160;&#160;&#160;0x00800000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Suspend/Resume support. </p>

</div>
</div>
<a id="ga44be36e2ec02c85117ff4da3435e8bfe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga44be36e2ec02c85117ff4da3435e8bfe">&#9670;&nbsp;</a></span>XSDPS_CAP_SYS_BUS_64_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_SYS_BUS_64_MASK&#160;&#160;&#160;0x10000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>64 bit system bus support </p>

</div>
</div>
<a id="ga7f2419c84165de7490b986fb72628bb7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7f2419c84165de7490b986fb72628bb7">&#9670;&nbsp;</a></span>XSDPS_CAP_TOUT_CLK_FREQ_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_TOUT_CLK_FREQ_MASK&#160;&#160;&#160;0x0000003FU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Timeout clock freq select. </p>

</div>
</div>
<a id="gaddc6983923c3eb7697ee7a3bb638763b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaddc6983923c3eb7697ee7a3bb638763b">&#9670;&nbsp;</a></span>XSDPS_CAP_TOUT_CLK_UNIT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_TOUT_CLK_UNIT_MASK&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Timeout clock unit - MHz/KHz. </p>

</div>
</div>
<a id="ga9fc8bf6ab09eedf732a86202f9d7e70d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9fc8bf6ab09eedf732a86202f9d7e70d">&#9670;&nbsp;</a></span>XSDPS_CAP_VOLT_1V8_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_VOLT_1V8_MASK&#160;&#160;&#160;0x04000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>1.8V support </p>

</div>
</div>
<a id="gae0b49ee267bef9af48701a0320f94f08"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae0b49ee267bef9af48701a0320f94f08">&#9670;&nbsp;</a></span>XSDPS_CAP_VOLT_3V0_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_VOLT_3V0_MASK&#160;&#160;&#160;0x02000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>3.0V support </p>

</div>
</div>
<a id="ga012393a10d9a75838355e716452d2ea3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga012393a10d9a75838355e716452d2ea3">&#9670;&nbsp;</a></span>XSDPS_CAP_VOLT_3V3_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAP_VOLT_3V3_MASK&#160;&#160;&#160;0x01000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>3.3V support </p>

</div>
</div>
<a id="gab0ce78ece9fa1db9247804edafb13034"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab0ce78ece9fa1db9247804edafb13034">&#9670;&nbsp;</a></span>XSDPS_CAPS_ASYNC_INTR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAPS_ASYNC_INTR_MASK&#160;&#160;&#160;0x20000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Async Interrupt support. </p>

</div>
</div>
<a id="ga749d3d705d7e3932f795287e6eb67c8f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga749d3d705d7e3932f795287e6eb67c8f">&#9670;&nbsp;</a></span>XSDPS_CAPS_EMB_SLOT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAPS_EMB_SLOT&#160;&#160;&#160;0x40000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Embedded Slot. </p>

</div>
</div>
<a id="ga20cfdec07d3d07d523fd62d67339ec0f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga20cfdec07d3d07d523fd62d67339ec0f">&#9670;&nbsp;</a></span>XSDPS_CAPS_EXT_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAPS_EXT_OFFSET&#160;&#160;&#160;0x44U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Capabilities Extended. </p>

</div>
</div>
<a id="ga112509649c3e0a85a48d471395f3ce6c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga112509649c3e0a85a48d471395f3ce6c">&#9670;&nbsp;</a></span>XSDPS_CAPS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAPS_OFFSET&#160;&#160;&#160;0x40U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Capabilities Register. </p>

</div>
</div>
<a id="ga6d46349d0c937ae8d5e1b574fb770ef9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6d46349d0c937ae8d5e1b574fb770ef9">&#9670;&nbsp;</a></span>XSDPS_CAPS_REM_CARD</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAPS_REM_CARD&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Removable Slot. </p>

</div>
</div>
<a id="ga65b992d6dfea0e058e00c186320fa920"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga65b992d6dfea0e058e00c186320fa920">&#9670;&nbsp;</a></span>XSDPS_CAPS_SHR_BUS</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAPS_SHR_BUS&#160;&#160;&#160;0x80000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Shared Bus Slot. </p>

</div>
</div>
<a id="ga1f09ac71fb5dfdd6d31e03deb280347b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1f09ac71fb5dfdd6d31e03deb280347b">&#9670;&nbsp;</a></span>XSDPS_CAPS_SLOT_TYPE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CAPS_SLOT_TYPE_MASK&#160;&#160;&#160;0xC0000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Slot Type. </p>

</div>
</div>
<a id="ga6386e0e4144576279df5f50d2e38625a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6386e0e4144576279df5f50d2e38625a">&#9670;&nbsp;</a></span>XSDPS_CLK_CTRL_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CLK_CTRL_OFFSET&#160;&#160;&#160;0x2CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Clock Control. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1f8661e4ae53a7c29b3fd44cc56a3673">XSdPs_Change_ClkFreq()</a>.</p>

</div>
</div>
<a id="ga1371f2d04ef2229cb465eb578b506e40"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1371f2d04ef2229cb465eb578b506e40">&#9670;&nbsp;</a></span>XSDPS_CMD_CRC_CHK_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_CRC_CHK_EN_MASK&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command CRC Check Enable. </p>

</div>
</div>
<a id="ga3d5faaad12dc07797d5ae69e67319efb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3d5faaad12dc07797d5ae69e67319efb">&#9670;&nbsp;</a></span>XSDPS_CMD_INX_CHK_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_INX_CHK_EN_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Index Check Enable. </p>

</div>
</div>
<a id="gada823ff9354fcf1af9205e7b952f95e9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gada823ff9354fcf1af9205e7b952f95e9">&#9670;&nbsp;</a></span>XSDPS_CMD_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_MASK&#160;&#160;&#160;0x00003F00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Index Mask - Set to CMD0-63, AMCD0-63. </p>

</div>
</div>
<a id="gac9d156acd34095afa82ca28c2d9fd711"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac9d156acd34095afa82ca28c2d9fd711">&#9670;&nbsp;</a></span>XSDPS_CMD_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_OFFSET&#160;&#160;&#160;0x0EU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Register. </p>

</div>
</div>
<a id="gafe5eec57bcd6cf8469b33aa6da746761"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafe5eec57bcd6cf8469b33aa6da746761">&#9670;&nbsp;</a></span>XSDPS_CMD_RESP_L136_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_RESP_L136_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response length 138. </p>

</div>
</div>
<a id="ga68fcef0c7fa75e2a8db1179870ea7ef5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga68fcef0c7fa75e2a8db1179870ea7ef5">&#9670;&nbsp;</a></span>XSDPS_CMD_RESP_L48_BSY_CHK_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_RESP_L48_BSY_CHK_MASK&#160;&#160;&#160;0x00000003U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response length 48 &amp; check busy after response. </p>

</div>
</div>
<a id="gab1cb6a89e3d65cdd481cf4f6e5238653"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab1cb6a89e3d65cdd481cf4f6e5238653">&#9670;&nbsp;</a></span>XSDPS_CMD_RESP_L48_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_RESP_L48_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response length 48. </p>

</div>
</div>
<a id="ga62463cbd471c830c64acf7d4ab41d76b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga62463cbd471c830c64acf7d4ab41d76b">&#9670;&nbsp;</a></span>XSDPS_CMD_RESP_NONE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_RESP_NONE_MASK&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>No Response. </p>

</div>
</div>
<a id="ga58908f7a593a05f6e4fed72e674357f0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga58908f7a593a05f6e4fed72e674357f0">&#9670;&nbsp;</a></span>XSDPS_CMD_RESP_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_RESP_SEL_MASK&#160;&#160;&#160;0x00000003U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response Type Select. </p>

</div>
</div>
<a id="gafb4281cc2c9c320698dd68bbb3c4df78"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafb4281cc2c9c320698dd68bbb3c4df78">&#9670;&nbsp;</a></span>XSDPS_CMD_TYPE_ABORT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_TYPE_ABORT_MASK&#160;&#160;&#160;0x000000C0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>CMD Type - Abort. </p>

</div>
</div>
<a id="ga326debf8eb92650f6d51bed52604ee8c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga326debf8eb92650f6d51bed52604ee8c">&#9670;&nbsp;</a></span>XSDPS_CMD_TYPE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_TYPE_MASK&#160;&#160;&#160;0x000000C0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Type. </p>

</div>
</div>
<a id="ga845855412bf4852727b11344c477488f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga845855412bf4852727b11344c477488f">&#9670;&nbsp;</a></span>XSDPS_CMD_TYPE_NORM_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_TYPE_NORM_MASK&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>CMD Type - Normal. </p>

</div>
</div>
<a id="gad0716c4ab5fafe32678697eccfef91ad"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad0716c4ab5fafe32678697eccfef91ad">&#9670;&nbsp;</a></span>XSDPS_CMD_TYPE_RESUME_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_TYPE_RESUME_MASK&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>CMD Type - Resume. </p>

</div>
</div>
<a id="ga0c332a6fc7e9df562458b562acb0c2b7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0c332a6fc7e9df562458b562acb0c2b7">&#9670;&nbsp;</a></span>XSDPS_CMD_TYPE_SUSPEND_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CMD_TYPE_SUSPEND_MASK&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>CMD Type - Suspend. </p>

</div>
</div>
<a id="gad5f983cd6daadb92a96fa4e7674541cc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad5f983cd6daadb92a96fa4e7674541cc">&#9670;&nbsp;</a></span>XSDPS_CT_ERROR</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_CT_ERROR&#160;&#160;&#160;0x2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>Command timeout flag. </p>

</div>
</div>
<a id="gac9024b7da140cf1c18555825b3827750"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac9024b7da140cf1c18555825b3827750">&#9670;&nbsp;</a></span>XSDPS_DAT_PRESENT_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_DAT_PRESENT_SEL_MASK&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data Present Select. </p>

</div>
</div>
<a id="gab9c1337b4b216e1c3777aaf0b3448824"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab9c1337b4b216e1c3777aaf0b3448824">&#9670;&nbsp;</a></span>XSDPS_ECAPS_CLK_MULT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_CLK_MULT_MASK&#160;&#160;&#160;0x00FF0000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Clock Multiplier value for Programmable clock mode. </p>

</div>
</div>
<a id="ga50eccb3a870bc419cecf6c6da386dfbd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga50eccb3a870bc419cecf6c6da386dfbd">&#9670;&nbsp;</a></span>XSDPS_ECAPS_DDR50_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_DDR50_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DDR50 Mode support. </p>

</div>
</div>
<a id="ga12be303cc3c88264cd1e8ec72f09406b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga12be303cc3c88264cd1e8ec72f09406b">&#9670;&nbsp;</a></span>XSDPS_ECAPS_DRV_TYPE_A_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_DRV_TYPE_A_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DriverType A support. </p>

</div>
</div>
<a id="ga78700495c722e732fd3bda1ac5240990"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga78700495c722e732fd3bda1ac5240990">&#9670;&nbsp;</a></span>XSDPS_ECAPS_DRV_TYPE_C_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_DRV_TYPE_C_MASK&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DriverType C support. </p>

</div>
</div>
<a id="gada67e1bfc4eb0435d1dfa9057363ec7a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gada67e1bfc4eb0435d1dfa9057363ec7a">&#9670;&nbsp;</a></span>XSDPS_ECAPS_DRV_TYPE_D_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_DRV_TYPE_D_MASK&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DriverType D support. </p>

</div>
</div>
<a id="ga3446aa973756cc6e19abad21145ba816"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3446aa973756cc6e19abad21145ba816">&#9670;&nbsp;</a></span>XSDPS_ECAPS_RE_TNG_MODE1_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_RE_TNG_MODE1_MASK&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Re-tuning mode 1. </p>

</div>
</div>
<a id="ga5e3e2528cd51b841ac13c14f4925437f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5e3e2528cd51b841ac13c14f4925437f">&#9670;&nbsp;</a></span>XSDPS_ECAPS_RE_TNG_MODE2_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_RE_TNG_MODE2_MASK&#160;&#160;&#160;0x00004000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Re-tuning mode 2. </p>

</div>
</div>
<a id="ga5446616f12b2bd88db6bffb478ea6cc7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5446616f12b2bd88db6bffb478ea6cc7">&#9670;&nbsp;</a></span>XSDPS_ECAPS_RE_TNG_MODE3_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_RE_TNG_MODE3_MASK&#160;&#160;&#160;0x00008000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Re-tuning mode 3. </p>

</div>
</div>
<a id="ga91f9aa179e225dd0bd2774ddf3db1135"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga91f9aa179e225dd0bd2774ddf3db1135">&#9670;&nbsp;</a></span>XSDPS_ECAPS_RE_TNG_MODES_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_RE_TNG_MODES_MASK&#160;&#160;&#160;0x0000C000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Re-tuning modes support. </p>

</div>
</div>
<a id="ga796c9bb9f5baf6d76601508f1cfe0f72"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga796c9bb9f5baf6d76601508f1cfe0f72">&#9670;&nbsp;</a></span>XSDPS_ECAPS_SDR104_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_SDR104_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDR104 Mode support. </p>

</div>
</div>
<a id="ga6e35fb285d854c5116e1ca14753c565b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6e35fb285d854c5116e1ca14753c565b">&#9670;&nbsp;</a></span>XSDPS_ECAPS_SDR50_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_SDR50_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDR50 Mode support. </p>

</div>
</div>
<a id="gaf14a3c87b813e9658946392db281aa34"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf14a3c87b813e9658946392db281aa34">&#9670;&nbsp;</a></span>XSDPS_ECAPS_SPI_BLK_MODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_SPI_BLK_MODE_MASK&#160;&#160;&#160;0x02000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SPI block mode. </p>

</div>
</div>
<a id="gad392e784af056b8f8da5b0f775812aac"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad392e784af056b8f8da5b0f775812aac">&#9670;&nbsp;</a></span>XSDPS_ECAPS_SPI_MODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_SPI_MODE_MASK&#160;&#160;&#160;0x01000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SPI mode. </p>

</div>
</div>
<a id="gad5eced61356597cec9544b57f20a6950"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad5eced61356597cec9544b57f20a6950">&#9670;&nbsp;</a></span>XSDPS_ECAPS_TMR_CNT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_TMR_CNT_MASK&#160;&#160;&#160;0x00000F00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Timer Count for Re-tuning. </p>

</div>
</div>
<a id="gad6f0ea0730e8f48c9419cefe9b13f418"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad6f0ea0730e8f48c9419cefe9b13f418">&#9670;&nbsp;</a></span>XSDPS_ECAPS_USE_TNG_SDR50_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ECAPS_USE_TNG_SDR50_MASK&#160;&#160;&#160;0x00002000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDR50 Mode needs tuning. </p>

</div>
</div>
<a id="ga92f6b9bc19b145ac7c2562115559d5dc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga92f6b9bc19b145ac7c2562115559d5dc">&#9670;&nbsp;</a></span>XSDPS_ERR_INTR_SIG_EN_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ERR_INTR_SIG_EN_OFFSET&#160;&#160;&#160;0x3AU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Error Interrupt Signal Enable Register. </p>

</div>
</div>
<a id="ga7ee4f57e03d125d31fb701b7b3540b47"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7ee4f57e03d125d31fb701b7b3540b47">&#9670;&nbsp;</a></span>XSDPS_ERR_INTR_STS_EN_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ERR_INTR_STS_EN_OFFSET&#160;&#160;&#160;0x36U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Error Interrupt Status Enable Register. </p>

</div>
</div>
<a id="ga21efb57620515a9d11db602b1122ab87"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga21efb57620515a9d11db602b1122ab87">&#9670;&nbsp;</a></span>XSDPS_ERR_INTR_STS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ERR_INTR_STS_OFFSET&#160;&#160;&#160;0x32U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Error Interrupt Status Register. </p>

</div>
</div>
<a id="gad18091c797badbc471309b3e306de17c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad18091c797badbc471309b3e306de17c">&#9670;&nbsp;</a></span>XSDPS_ERROR_INTR_ALL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_ERROR_INTR_ALL_MASK&#160;&#160;&#160;0x0000F3FFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Mask for error bits. </p>

</div>
</div>
<a id="gabd5768e81d9cac3561272bfa74ed4085"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabd5768e81d9cac3561272bfa74ed4085">&#9670;&nbsp;</a></span>XSDPS_FE_AUTO_CMD12_EIS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_AUTO_CMD12_EIS_OFFSET&#160;&#160;&#160;0x50U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CM12 Error Interrupt Status Register. </p>

</div>
</div>
<a id="gafbf0816847c780fdad87a70813332d42"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafbf0816847c780fdad87a70813332d42">&#9670;&nbsp;</a></span>XSDPS_FE_AUTO_CMD12_NT_EX_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_AUTO_CMD12_NT_EX_MASK&#160;&#160;&#160;0x0001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD12 Not executed. </p>

</div>
</div>
<a id="ga933c4fe24bc9da8ea9ae560f64dc0a4c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga933c4fe24bc9da8ea9ae560f64dc0a4c">&#9670;&nbsp;</a></span>XSDPS_FE_AUTO_CMD_CNI_ERR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_AUTO_CMD_CNI_ERR_MASK&#160;&#160;&#160;0x0080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command not issued by Auto CMD12 Error. </p>

</div>
</div>
<a id="gac9bfdf1e2810abdd1b6be67d59caf3c1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac9bfdf1e2810abdd1b6be67d59caf3c1">&#9670;&nbsp;</a></span>XSDPS_FE_AUTO_CMD_CRC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_AUTO_CMD_CRC_MASK&#160;&#160;&#160;0x0004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD CRC Error. </p>

</div>
</div>
<a id="gadeea93001185e95b88a7603d8b6d357f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadeea93001185e95b88a7603d8b6d357f">&#9670;&nbsp;</a></span>XSDPS_FE_AUTO_CMD_EB_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_AUTO_CMD_EB_MASK&#160;&#160;&#160;0x0008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD End Bit Error. </p>

</div>
</div>
<a id="ga3d5199bc9bb272601190471d71b0a799"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3d5199bc9bb272601190471d71b0a799">&#9670;&nbsp;</a></span>XSDPS_FE_AUTO_CMD_IND_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_AUTO_CMD_IND_MASK&#160;&#160;&#160;0x0010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD Index Error. </p>

</div>
</div>
<a id="ga5475bd98baa054560f8f361f87b79fd4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5475bd98baa054560f8f361f87b79fd4">&#9670;&nbsp;</a></span>XSDPS_FE_AUTO_CMD_TOUT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_AUTO_CMD_TOUT_MASK&#160;&#160;&#160;0x0002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD Timeout Error. </p>

</div>
</div>
<a id="gab01df91285e39e58676fdf2ee0e6d8dd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab01df91285e39e58676fdf2ee0e6d8dd">&#9670;&nbsp;</a></span>XSDPS_FE_ERR_INT_STS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_ERR_INT_STS_OFFSET&#160;&#160;&#160;0x52U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Force Event for Error Interrupt Status. </p>

</div>
</div>
<a id="ga7fcca79703aebabd0e8e182254120ffe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7fcca79703aebabd0e8e182254120ffe">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_ADMA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_ADMA_MASK&#160;&#160;&#160;0x0200U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Error. </p>

</div>
</div>
<a id="gaece41fd1a757cb9834cb7f786169a260"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaece41fd1a757cb9834cb7f786169a260">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_AUTO_CMD_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_AUTO_CMD_MASK&#160;&#160;&#160;0x0100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD Error. </p>

</div>
</div>
<a id="ga3c078ba41d9344d9772f343e6571b840"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3c078ba41d9344d9772f343e6571b840">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_CCRC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_CCRC_MASK&#160;&#160;&#160;0x0002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command CRC Error. </p>

</div>
</div>
<a id="ga9334f240054e1d49f435867900e9ed26"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9334f240054e1d49f435867900e9ed26">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_CEB_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_CEB_MASK&#160;&#160;&#160;0x0004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command End Bit Error. </p>

</div>
</div>
<a id="ga820948cf65ec010bce369853a2d13ccc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga820948cf65ec010bce369853a2d13ccc">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_CI_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_CI_MASK&#160;&#160;&#160;0x0008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Index Error. </p>

</div>
</div>
<a id="ga942f66dfaeb4d45d5bfe238d0cb22cd9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga942f66dfaeb4d45d5bfe238d0cb22cd9">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_CT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_CT_MASK&#160;&#160;&#160;0x0001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Timeout Error. </p>

</div>
</div>
<a id="ga644e367fef3279fafbf7582b3ee628b4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga644e367fef3279fafbf7582b3ee628b4">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_CUR_LMT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_CUR_LMT_MASK&#160;&#160;&#160;0x0080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Current Limit Error. </p>

</div>
</div>
<a id="ga33be277874e3b2de5df2543f4f98b5ee"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga33be277874e3b2de5df2543f4f98b5ee">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_DCRC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_DCRC_MASK&#160;&#160;&#160;0x0020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data CRC Error. </p>

</div>
</div>
<a id="gaecb185122ce4431bdc1d414aef7c28a5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaecb185122ce4431bdc1d414aef7c28a5">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_DEB_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_DEB_MASK&#160;&#160;&#160;0x0040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data End Bit Error. </p>

</div>
</div>
<a id="ga1b1d455b484c4b23d50f5fcabd19686e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1b1d455b484c4b23d50f5fcabd19686e">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_DT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_DT_MASK&#160;&#160;&#160;0x0010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data Timeout Error. </p>

</div>
</div>
<a id="ga64d782566f6120a2d26559adbb83fd1e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga64d782566f6120a2d26559adbb83fd1e">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_ERR_TR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_ERR_TR_MASK&#160;&#160;&#160;0x1000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Target Reponse. </p>

</div>
</div>
<a id="ga470fdd6237f2481fc0110f5e84a2bf89"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga470fdd6237f2481fc0110f5e84a2bf89">&#9670;&nbsp;</a></span>XSDPS_FE_INTR_VEND_SPF_ERR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_FE_INTR_VEND_SPF_ERR_MASK&#160;&#160;&#160;0xE000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Vendor Specific Error. </p>

</div>
</div>
<a id="ga34b97943b05c5e36e76bb33c110bf5ec"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga34b97943b05c5e36e76bb33c110bf5ec">&#9670;&nbsp;</a></span>XSDPS_HC2_1V8_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_1V8_EN_MASK&#160;&#160;&#160;0x0008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>1.8V Signal Enable </p>

</div>
</div>
<a id="ga8fd430bfd1b55b0af5e957c4ec819497"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8fd430bfd1b55b0af5e957c4ec819497">&#9670;&nbsp;</a></span>XSDPS_HC2_ASYNC_INTR_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_ASYNC_INTR_EN_MASK&#160;&#160;&#160;0x4000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Asynchronous Interrupt Enable. </p>

</div>
</div>
<a id="gad867fc96ee217a8d25427e7e73e60d84"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad867fc96ee217a8d25427e7e73e60d84">&#9670;&nbsp;</a></span>XSDPS_HC2_DRV_STR_A_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_DRV_STR_A_MASK&#160;&#160;&#160;0x0010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Driver Strength A. </p>

</div>
</div>
<a id="gad864537837f8bf00fcbdba40d98d2c22"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad864537837f8bf00fcbdba40d98d2c22">&#9670;&nbsp;</a></span>XSDPS_HC2_DRV_STR_B_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_DRV_STR_B_MASK&#160;&#160;&#160;0x0000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Driver Strength B. </p>

</div>
</div>
<a id="gac0d91eb2b8c929cccc70eece21feda20"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac0d91eb2b8c929cccc70eece21feda20">&#9670;&nbsp;</a></span>XSDPS_HC2_DRV_STR_C_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_DRV_STR_C_MASK&#160;&#160;&#160;0x0020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Driver Strength C. </p>

</div>
</div>
<a id="ga235987e057b393b5030dc9458c2758a1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga235987e057b393b5030dc9458c2758a1">&#9670;&nbsp;</a></span>XSDPS_HC2_DRV_STR_D_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_DRV_STR_D_MASK&#160;&#160;&#160;0x0030U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Driver Strength D. </p>

</div>
</div>
<a id="ga2d1236addf75c3005c78496a279568cd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2d1236addf75c3005c78496a279568cd">&#9670;&nbsp;</a></span>XSDPS_HC2_DRV_STR_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_DRV_STR_SEL_MASK&#160;&#160;&#160;0x0030U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Driver Strength Selection. </p>

</div>
</div>
<a id="ga08e0062ddf1561584e922d35239dc874"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga08e0062ddf1561584e922d35239dc874">&#9670;&nbsp;</a></span>XSDPS_HC2_EXEC_TNG_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_EXEC_TNG_MASK&#160;&#160;&#160;0x0040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Execute Tuning. </p>

</div>
</div>
<a id="ga9c112853e3726cf385e6989410c31a3e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9c112853e3726cf385e6989410c31a3e">&#9670;&nbsp;</a></span>XSDPS_HC2_PRE_VAL_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_PRE_VAL_EN_MASK&#160;&#160;&#160;0x8000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Preset Value Enable. </p>

</div>
</div>
<a id="gaedb760cc7b7e76483fd55cf813c77aa4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaedb760cc7b7e76483fd55cf813c77aa4">&#9670;&nbsp;</a></span>XSDPS_HC2_SAMP_CLK_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_SAMP_CLK_SEL_MASK&#160;&#160;&#160;0x0080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Sampling Clock Selection. </p>

</div>
</div>
<a id="ga278cc6b488db8707244f12c63d94b305"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga278cc6b488db8707244f12c63d94b305">&#9670;&nbsp;</a></span>XSDPS_HC2_UHS_MODE_DDR50_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_UHS_MODE_DDR50_MASK&#160;&#160;&#160;0x0004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DDR50 UHS Mode. </p>

</div>
</div>
<a id="ga137b2781f85ffdfea87a8db1dcdcdcb9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga137b2781f85ffdfea87a8db1dcdcdcb9">&#9670;&nbsp;</a></span>XSDPS_HC2_UHS_MODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_UHS_MODE_MASK&#160;&#160;&#160;0x0007U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>UHS Mode select bits. </p>

</div>
</div>
<a id="ga2788488008f5eaf8d4756ea282f1ef68"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2788488008f5eaf8d4756ea282f1ef68">&#9670;&nbsp;</a></span>XSDPS_HC2_UHS_MODE_SDR104_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_UHS_MODE_SDR104_MASK&#160;&#160;&#160;0x0003U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDR104 UHS Mode. </p>

</div>
</div>
<a id="ga808fb682506fc651c6d6ee0a909acb0c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga808fb682506fc651c6d6ee0a909acb0c">&#9670;&nbsp;</a></span>XSDPS_HC2_UHS_MODE_SDR12_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_UHS_MODE_SDR12_MASK&#160;&#160;&#160;0x0000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDR12 UHS Mode. </p>

</div>
</div>
<a id="ga5eadbc34e65c3faf83e6d68a49a2c04f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5eadbc34e65c3faf83e6d68a49a2c04f">&#9670;&nbsp;</a></span>XSDPS_HC2_UHS_MODE_SDR25_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_UHS_MODE_SDR25_MASK&#160;&#160;&#160;0x0001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDR25 UHS Mode. </p>

</div>
</div>
<a id="ga981a556047754194a28706b1cb30f082"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga981a556047754194a28706b1cb30f082">&#9670;&nbsp;</a></span>XSDPS_HC2_UHS_MODE_SDR50_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC2_UHS_MODE_SDR50_MASK&#160;&#160;&#160;0x0002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDR50 UHS Mode. </p>

</div>
</div>
<a id="ga4ea64b27d798c4cd1733ef26b65d98f2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4ea64b27d798c4cd1733ef26b65d98f2">&#9670;&nbsp;</a></span>XSDPS_HC_CARD_DET_SD_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_CARD_DET_SD_MASK&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card Detect Sig Det. </p>

</div>
</div>
<a id="ga13211634fd4e0cc01a30fc4288724eb1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga13211634fd4e0cc01a30fc4288724eb1">&#9670;&nbsp;</a></span>XSDPS_HC_CARD_DET_TL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_CARD_DET_TL_MASK&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card Detect Tst Lvl. </p>

</div>
</div>
<a id="gabd47fcd2436119baf84ad740068bc321"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabd47fcd2436119baf84ad740068bc321">&#9670;&nbsp;</a></span>XSDPS_HC_DMA_ADMA1_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_DMA_ADMA1_MASK&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA1 Mode. </p>

</div>
</div>
<a id="gaabcb7733a1802a8333d0dda8967787d9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaabcb7733a1802a8333d0dda8967787d9">&#9670;&nbsp;</a></span>XSDPS_HC_DMA_ADMA2_32_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_DMA_ADMA2_32_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA2 Mode - 32 bit. </p>

</div>
</div>
<a id="gacab6623568de7b823a7921ca34137472"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacab6623568de7b823a7921ca34137472">&#9670;&nbsp;</a></span>XSDPS_HC_DMA_ADMA2_64_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_DMA_ADMA2_64_MASK&#160;&#160;&#160;0x00000018U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA2 Mode - 64 bit. </p>

</div>
</div>
<a id="ga572fb87d6aa81b262334d7a81b75d944"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga572fb87d6aa81b262334d7a81b75d944">&#9670;&nbsp;</a></span>XSDPS_HC_DMA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_DMA_MASK&#160;&#160;&#160;0x00000018U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DMA Mode Select. </p>

</div>
</div>
<a id="ga127f193afe1341b5055f1cb46e5823f5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga127f193afe1341b5055f1cb46e5823f5">&#9670;&nbsp;</a></span>XSDPS_HC_DMA_SDMA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_DMA_SDMA_MASK&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDMA Mode. </p>

</div>
</div>
<a id="ga053e5cfcf8ad9023810507a1ef2f15bf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga053e5cfcf8ad9023810507a1ef2f15bf">&#9670;&nbsp;</a></span>XSDPS_HC_EXT_BUS_WIDTH</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_EXT_BUS_WIDTH&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Bus width - 8 bit. </p>

</div>
</div>
<a id="ga5be4b7a09bc5b3703fcdcbc6e299981f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5be4b7a09bc5b3703fcdcbc6e299981f">&#9670;&nbsp;</a></span>XSDPS_HC_LED_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_LED_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>LED Control. </p>

</div>
</div>
<a id="gaa173508eec0c07f8dc79e46c54a2e45d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa173508eec0c07f8dc79e46c54a2e45d">&#9670;&nbsp;</a></span>XSDPS_HC_SPEC_VER_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_SPEC_VER_MASK&#160;&#160;&#160;0x00FFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Host Specification version mask. </p>

</div>
</div>
<a id="gaa07ab5096cbcff0ea531cd87dad81b99"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa07ab5096cbcff0ea531cd87dad81b99">&#9670;&nbsp;</a></span>XSDPS_HC_SPEED_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_SPEED_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>High Speed. </p>

</div>
</div>
<a id="ga24d5110ca34a796772f5414becf30cef"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga24d5110ca34a796772f5414becf30cef">&#9670;&nbsp;</a></span>XSDPS_HC_VENDOR_VER</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_VENDOR_VER&#160;&#160;&#160;0xFF00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Vendor Specification version mask. </p>

</div>
</div>
<a id="ga259e62cdf5c866dfcc1607810a14e293"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga259e62cdf5c866dfcc1607810a14e293">&#9670;&nbsp;</a></span>XSDPS_HC_WIDTH_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HC_WIDTH_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Bus width. </p>

</div>
</div>
<a id="ga69689aa6e0a5e28196b28c882a9236ae"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga69689aa6e0a5e28196b28c882a9236ae">&#9670;&nbsp;</a></span>XSDPS_HOST_CTRL1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HOST_CTRL1_OFFSET&#160;&#160;&#160;0x28U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Host Control 1. </p>

</div>
</div>
<a id="ga487b97e471f359589c38ae2ecba72b0c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga487b97e471f359589c38ae2ecba72b0c">&#9670;&nbsp;</a></span>XSDPS_HOST_CTRL2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HOST_CTRL2_OFFSET&#160;&#160;&#160;0x3EU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Host Control2 Register. </p>

</div>
</div>
<a id="gacc3553b03dddae404e91c08e9a6f6a1e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacc3553b03dddae404e91c08e9a6f6a1e">&#9670;&nbsp;</a></span>XSDPS_HOST_CTRL_VER_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_HOST_CTRL_VER_OFFSET&#160;&#160;&#160;0xFEU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Host Controller Version Register. </p>

</div>
</div>
<a id="ga27059a9a3c7fd408982210e6d987da73"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga27059a9a3c7fd408982210e6d987da73">&#9670;&nbsp;</a></span>XSDPS_INTR_BGE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_BGE_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Gap Event. </p>

</div>
</div>
<a id="ga88d6aea5ee66dcbcde471075077698c5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga88d6aea5ee66dcbcde471075077698c5">&#9670;&nbsp;</a></span>XSDPS_INTR_BOOT_ACK_RECV_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_BOOT_ACK_RECV_MASK&#160;&#160;&#160;0x00002000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Boot Ack Recv Interrupt. </p>

</div>
</div>
<a id="gaa6362c409b3b455ed19ec98a0b51b3b3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa6362c409b3b455ed19ec98a0b51b3b3">&#9670;&nbsp;</a></span>XSDPS_INTR_BOOT_TERM_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_BOOT_TERM_MASK&#160;&#160;&#160;0x00004000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Boot Terminate Interrupt. </p>

</div>
</div>
<a id="ga7bbc8becd90cb01642edd92506a1248b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7bbc8becd90cb01642edd92506a1248b">&#9670;&nbsp;</a></span>XSDPS_INTR_BRR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_BRR_MASK&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Buffer Read Ready. </p>

</div>
</div>
<a id="ga5d672782729e8b0c229f4f01b248048c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5d672782729e8b0c229f4f01b248048c">&#9670;&nbsp;</a></span>XSDPS_INTR_BWR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_BWR_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Buffer Write Ready. </p>

</div>
</div>
<a id="gaa7c2b759ff1ab9952510b9b5cf7aff96"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa7c2b759ff1ab9952510b9b5cf7aff96">&#9670;&nbsp;</a></span>XSDPS_INTR_CARD_INSRT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_CARD_INSRT_MASK&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card Insert. </p>

</div>
</div>
<a id="ga3b1b702abf5a0ff69ccc6383b0e5d9da"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3b1b702abf5a0ff69ccc6383b0e5d9da">&#9670;&nbsp;</a></span>XSDPS_INTR_CARD_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_CARD_MASK&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card Interrupt. </p>

</div>
</div>
<a id="gaa4adb4ac37e12bc96c1b3585c9447aba"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa4adb4ac37e12bc96c1b3585c9447aba">&#9670;&nbsp;</a></span>XSDPS_INTR_CARD_REM_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_CARD_REM_MASK&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card Remove. </p>

</div>
</div>
<a id="ga96cfd1bf0599a109711447c1839ee6a5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga96cfd1bf0599a109711447c1839ee6a5">&#9670;&nbsp;</a></span>XSDPS_INTR_CC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_CC_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Complete. </p>

</div>
</div>
<a id="gad960f4977815a61110da4820f4385a31"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad960f4977815a61110da4820f4385a31">&#9670;&nbsp;</a></span>XSDPS_INTR_DMA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_DMA_MASK&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DMA Interrupt. </p>

</div>
</div>
<a id="ga5adf2824bddb770961a5dd1336d2b581"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5adf2824bddb770961a5dd1336d2b581">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_ADMA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_ADMA_MASK&#160;&#160;&#160;0x00000200U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>ADMA Error. </p>

</div>
</div>
<a id="ga873a2c76cf80e26d31e9ee227453fcee"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga873a2c76cf80e26d31e9ee227453fcee">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_AUTO_CMD12_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_AUTO_CMD12_MASK&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD12 Error. </p>

</div>
</div>
<a id="ga356b1f6f6eb40bdb4962f7b95d4e74cc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga356b1f6f6eb40bdb4962f7b95d4e74cc">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_CCRC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_CCRC_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command CRC Error. </p>

</div>
</div>
<a id="ga51fa8b4e90349c15b2b4c6cf15b244fe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga51fa8b4e90349c15b2b4c6cf15b244fe">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_CEB_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_CEB_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command End Bit Error. </p>

</div>
</div>
<a id="ga473884b57279b144c031a78c806f296a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga473884b57279b144c031a78c806f296a">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_CI_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_CI_MASK&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Index Error. </p>

</div>
</div>
<a id="gae2736e5f9616fa0a8093c032d73e8c06"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae2736e5f9616fa0a8093c032d73e8c06">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_CT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_CT_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Timeout Error. </p>

</div>
</div>
<a id="ga0dcbe29c28355e236a13b1ae0254d230"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0dcbe29c28355e236a13b1ae0254d230">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_CUR_LMT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_CUR_LMT_MASK&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Current Limit Error. </p>

</div>
</div>
<a id="ga849509ac4a8f9c74cd379e08f98ffa39"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga849509ac4a8f9c74cd379e08f98ffa39">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_DCRC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_DCRC_MASK&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data CRC Error. </p>

</div>
</div>
<a id="ga01c4cf977a20ba47e930cf8238a913c7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga01c4cf977a20ba47e930cf8238a913c7">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_DEB_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_DEB_MASK&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data End Bit Error. </p>

</div>
</div>
<a id="ga73b422b3ba2abff3ca25606fdbd80618"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga73b422b3ba2abff3ca25606fdbd80618">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_DT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_DT_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data Timeout Error. </p>

</div>
</div>
<a id="ga322ecca01a208464114226107c6a2961"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga322ecca01a208464114226107c6a2961">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_MASK&#160;&#160;&#160;0x00008000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Error Interrupt. </p>

</div>
</div>
<a id="ga0339ecbff53196547e90f18a9f1a0705"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0339ecbff53196547e90f18a9f1a0705">&#9670;&nbsp;</a></span>XSDPS_INTR_ERR_TR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_ERR_TR_MASK&#160;&#160;&#160;0x00001000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Tuning Error. </p>

</div>
</div>
<a id="ga964e307b375ae74c1eaf4c80424626f5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga964e307b375ae74c1eaf4c80424626f5">&#9670;&nbsp;</a></span>XSDPS_INTR_INT_A_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_INT_A_MASK&#160;&#160;&#160;0x00000200U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>INT A Interrupt. </p>

</div>
</div>
<a id="ga6acf366156b796a418bbdc3549dc0a09"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6acf366156b796a418bbdc3549dc0a09">&#9670;&nbsp;</a></span>XSDPS_INTR_INT_B_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_INT_B_MASK&#160;&#160;&#160;0x00000400U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>INT B Interrupt. </p>

</div>
</div>
<a id="ga69fae19f390aed99650ce4c01e3908d3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga69fae19f390aed99650ce4c01e3908d3">&#9670;&nbsp;</a></span>XSDPS_INTR_INT_C_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_INT_C_MASK&#160;&#160;&#160;0x00000800U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>INT C Interrupt. </p>

</div>
</div>
<a id="ga9cbac1a02ae6280d17d3e928566ebef0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9cbac1a02ae6280d17d3e928566ebef0">&#9670;&nbsp;</a></span>XSDPS_INTR_RE_TUNING_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_RE_TUNING_MASK&#160;&#160;&#160;0x00001000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Re-Tuning Interrupt. </p>

</div>
</div>
<a id="ga4840b3795e951ab39a111003464f2334"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4840b3795e951ab39a111003464f2334">&#9670;&nbsp;</a></span>XSDPS_INTR_TC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_TC_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Transfer Complete. </p>

</div>
</div>
<a id="gaa9895662840100832b44870fb9c805ba"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa9895662840100832b44870fb9c805ba">&#9670;&nbsp;</a></span>XSDPS_INTR_VEND_SPF_ERR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_INTR_VEND_SPF_ERR_MASK&#160;&#160;&#160;0x0000E000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Vendor Specific Error. </p>

</div>
</div>
<a id="gafcee55cb77e32bd74fd4e2be98ac5458"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafcee55cb77e32bd74fd4e2be98ac5458">&#9670;&nbsp;</a></span>XSDPS_MAX_CUR_CAPS_1V8_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_MAX_CUR_CAPS_1V8_MASK&#160;&#160;&#160;0x00000F00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Maximum Current Capability at 1.8V. </p>

</div>
</div>
<a id="ga3af047ba2175efe0ad380766d309586b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3af047ba2175efe0ad380766d309586b">&#9670;&nbsp;</a></span>XSDPS_MAX_CUR_CAPS_3V0_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_MAX_CUR_CAPS_3V0_MASK&#160;&#160;&#160;0x000000F0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Maximum Current Capability at 3.0V. </p>

</div>
</div>
<a id="ga294b0057bfba29e83c63bc05453eaa50"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga294b0057bfba29e83c63bc05453eaa50">&#9670;&nbsp;</a></span>XSDPS_MAX_CUR_CAPS_3V3_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_MAX_CUR_CAPS_3V3_MASK&#160;&#160;&#160;0x0000000FU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Maximum Current Capability at 3.3V. </p>

</div>
</div>
<a id="gafc0ea43ff8514a49657c11921e255efa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafc0ea43ff8514a49657c11921e255efa">&#9670;&nbsp;</a></span>XSDPS_MAX_CURR_CAPS_EXT_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_MAX_CURR_CAPS_EXT_OFFSET&#160;&#160;&#160;0x4CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Maximum Current Capabilities Ext Register. </p>

</div>
</div>
<a id="gac0e5b893a03b99150d02a98f504917fe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac0e5b893a03b99150d02a98f504917fe">&#9670;&nbsp;</a></span>XSDPS_MAX_CURR_CAPS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_MAX_CURR_CAPS_OFFSET&#160;&#160;&#160;0x48U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Maximum Current Capabilities Register. </p>

</div>
</div>
<a id="gad8416be998260fa01debc6037f93ee80"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad8416be998260fa01debc6037f93ee80">&#9670;&nbsp;</a></span>XSDPS_NORM_INTR_SIG_EN_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_NORM_INTR_SIG_EN_OFFSET&#160;&#160;&#160;0x38U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Normal Interrupt Signal Enable Register. </p>

</div>
</div>
<a id="ga141e3bd95516c55db282fd0a16a290c4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga141e3bd95516c55db282fd0a16a290c4">&#9670;&nbsp;</a></span>XSDPS_NORM_INTR_STS_EN_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_NORM_INTR_STS_EN_OFFSET&#160;&#160;&#160;0x34U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Normal Interrupt Status Enable Register. </p>

</div>
</div>
<a id="ga2aa0027ce006eb71c2a954f66643ab54"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2aa0027ce006eb71c2a954f66643ab54">&#9670;&nbsp;</a></span>XSDPS_NORM_INTR_STS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_NORM_INTR_STS_OFFSET&#160;&#160;&#160;0x30U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Normal Interrupt Status Register. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="ga1c329941406ddae454526e1711bd5aa3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1c329941406ddae454526e1711bd5aa3">&#9670;&nbsp;</a></span>XSDPS_PC_BUS_PWR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PC_BUS_PWR_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Bus Power Control. </p>

</div>
</div>
<a id="ga03c307e41770161bb6777aba8cfc79ea"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga03c307e41770161bb6777aba8cfc79ea">&#9670;&nbsp;</a></span>XSDPS_PC_BUS_VSEL_1V8_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PC_BUS_VSEL_1V8_MASK&#160;&#160;&#160;0x0000000AU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Bus Voltage 1.8V. </p>

</div>
</div>
<a id="gaf92a9b2a3faa4002072359e7694541a4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf92a9b2a3faa4002072359e7694541a4">&#9670;&nbsp;</a></span>XSDPS_PC_BUS_VSEL_3V0_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PC_BUS_VSEL_3V0_MASK&#160;&#160;&#160;0x0000000CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Bus Voltage 3.0V. </p>

</div>
</div>
<a id="gaa5dcd35047822e69db6ebaa895160954"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa5dcd35047822e69db6ebaa895160954">&#9670;&nbsp;</a></span>XSDPS_PC_BUS_VSEL_3V3_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PC_BUS_VSEL_3V3_MASK&#160;&#160;&#160;0x0000000EU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Bus Voltage 3.3V. </p>

</div>
</div>
<a id="ga73a0ec34c6a3e9b5b731ad1b52a2be4e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga73a0ec34c6a3e9b5b731ad1b52a2be4e">&#9670;&nbsp;</a></span>XSDPS_PC_BUS_VSEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PC_BUS_VSEL_MASK&#160;&#160;&#160;0x0000000EU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Bus Voltage Select. </p>

</div>
</div>
<a id="ga6c09ea0e09500857567b1c13dfa6ecaf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6c09ea0e09500857567b1c13dfa6ecaf">&#9670;&nbsp;</a></span>XSDPS_PC_EMMC_HW_RST_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PC_EMMC_HW_RST_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>HW reset for eMMC. </p>

</div>
</div>
<a id="ga380e8cce3edea7db613b20edb3d51646"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga380e8cce3edea7db613b20edb3d51646">&#9670;&nbsp;</a></span>XSDPS_POWER_CTRL_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_POWER_CTRL_OFFSET&#160;&#160;&#160;0x29U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Power Control. </p>

</div>
</div>
<a id="ga01c4bf3a64f6748aad4018ef932a7671"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga01c4bf3a64f6748aad4018ef932a7671">&#9670;&nbsp;</a></span>XSDPS_PRE_VAL_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRE_VAL_1_OFFSET&#160;&#160;&#160;0x60U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Preset Value Register. </p>

</div>
</div>
<a id="ga8f3ff3f7193c94d20372109e31c31dc0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8f3ff3f7193c94d20372109e31c31dc0">&#9670;&nbsp;</a></span>XSDPS_PRE_VAL_2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRE_VAL_2_OFFSET&#160;&#160;&#160;0x64U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Preset Value Register. </p>

</div>
</div>
<a id="ga13836352ecc3b8b09cbb480fe85cfb88"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga13836352ecc3b8b09cbb480fe85cfb88">&#9670;&nbsp;</a></span>XSDPS_PRE_VAL_3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRE_VAL_3_OFFSET&#160;&#160;&#160;0x68U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Preset Value Register. </p>

</div>
</div>
<a id="ga31026ac0c37e10723c72bc56bcf4cf62"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga31026ac0c37e10723c72bc56bcf4cf62">&#9670;&nbsp;</a></span>XSDPS_PRE_VAL_4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRE_VAL_4_OFFSET&#160;&#160;&#160;0x6CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Preset Value Register. </p>

</div>
</div>
<a id="gac8967bcc25fbea6d46521b28db3afd9d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac8967bcc25fbea6d46521b28db3afd9d">&#9670;&nbsp;</a></span>XSDPS_PRE_VAL_CLK_GEN_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRE_VAL_CLK_GEN_SEL_MASK&#160;&#160;&#160;0x0400U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Clock Generator Mode Select. </p>

</div>
</div>
<a id="ga00a11d17ff0271f58f9f4bca9110d077"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga00a11d17ff0271f58f9f4bca9110d077">&#9670;&nbsp;</a></span>XSDPS_PRE_VAL_DRV_STR_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRE_VAL_DRV_STR_SEL_MASK&#160;&#160;&#160;0xC000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Driver Strength Select Value. </p>

</div>
</div>
<a id="ga0c8955eab471574a4284010f44691a65"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0c8955eab471574a4284010f44691a65">&#9670;&nbsp;</a></span>XSDPS_PRE_VAL_SDCLK_FSEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRE_VAL_SDCLK_FSEL_MASK&#160;&#160;&#160;0x03FFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDCLK Frequency Select Value. </p>

</div>
</div>
<a id="gac4498ffd6183ea9be4bee7d2f178d8d0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac4498ffd6183ea9be4bee7d2f178d8d0">&#9670;&nbsp;</a></span>XSDPS_PRES_STATE_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PRES_STATE_OFFSET&#160;&#160;&#160;0x24U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Present State. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>, and <a class="el" href="group__sdps__v2__5.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize()</a>.</p>

</div>
</div>
<a id="ga21b1e1d2f988135ab95198b7f1b38f00"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga21b1e1d2f988135ab95198b7f1b38f00">&#9670;&nbsp;</a></span>XSDPS_PSR_BUFF_RD_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_BUFF_RD_EN_MASK&#160;&#160;&#160;0x00000800U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Buffer read enable. </p>

</div>
</div>
<a id="gaff86a8ab013da92250fcc5747040c3f8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaff86a8ab013da92250fcc5747040c3f8">&#9670;&nbsp;</a></span>XSDPS_PSR_BUFF_WR_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_BUFF_WR_EN_MASK&#160;&#160;&#160;0x00000400U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Buffer write enable. </p>

</div>
</div>
<a id="gabde146f7896b0cf9b576572a17e5fe19"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabde146f7896b0cf9b576572a17e5fe19">&#9670;&nbsp;</a></span>XSDPS_PSR_CARD_DPL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_CARD_DPL_MASK&#160;&#160;&#160;0x00040000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card detect pin level. </p>

</div>
</div>
<a id="ga101467d47c4d7a58b43009892170ce86"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga101467d47c4d7a58b43009892170ce86">&#9670;&nbsp;</a></span>XSDPS_PSR_CARD_INSRT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_CARD_INSRT_MASK&#160;&#160;&#160;0x00010000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card inserted. </p>

</div>
</div>
<a id="ga7ac2da27df6b90a8ad75cf1bbc309b0a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7ac2da27df6b90a8ad75cf1bbc309b0a">&#9670;&nbsp;</a></span>XSDPS_PSR_CARD_STABLE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_CARD_STABLE_MASK&#160;&#160;&#160;0x00020000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Card state stable. </p>

</div>
</div>
<a id="ga30516f53fe6a4fe580039cdb3ad6f0db"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga30516f53fe6a4fe580039cdb3ad6f0db">&#9670;&nbsp;</a></span>XSDPS_PSR_CMD_SG_LVL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_CMD_SG_LVL_MASK&#160;&#160;&#160;0x01000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Cmd Line signal lvl. </p>

</div>
</div>
<a id="ga56a5d17d824207b7f14abc374a7cc081"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga56a5d17d824207b7f14abc374a7cc081">&#9670;&nbsp;</a></span>XSDPS_PSR_DAT30_SG_LVL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_DAT30_SG_LVL_MASK&#160;&#160;&#160;0x00F00000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data 3:0 signal lvl. </p>

</div>
</div>
<a id="ga2449643d311274c8aec7c0342c341ff9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2449643d311274c8aec7c0342c341ff9">&#9670;&nbsp;</a></span>XSDPS_PSR_DAT74_SG_LVL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_DAT74_SG_LVL_MASK&#160;&#160;&#160;0x1E000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data 7:4 signal lvl. </p>

</div>
</div>
<a id="gaffd59f40c935ac11c82b090afe90f12c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaffd59f40c935ac11c82b090afe90f12c">&#9670;&nbsp;</a></span>XSDPS_PSR_DAT_ACTIVE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_DAT_ACTIVE_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DAT line active. </p>

</div>
</div>
<a id="ga202c8bc912a7f2b42afdd10887f0c493"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga202c8bc912a7f2b42afdd10887f0c493">&#9670;&nbsp;</a></span>XSDPS_PSR_INHIBIT_CMD_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_INHIBIT_CMD_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command inhibit - CMD. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>, and <a class="el" href="group__sdps__v2__5.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize()</a>.</p>

</div>
</div>
<a id="ga7814152da74fef6a4308ea81908ad0bb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7814152da74fef6a4308ea81908ad0bb">&#9670;&nbsp;</a></span>XSDPS_PSR_INHIBIT_DAT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_INHIBIT_DAT_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Command Inhibit - DAT. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize()</a>.</p>

</div>
</div>
<a id="gad7191fb295684001ff129d277151548b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad7191fb295684001ff129d277151548b">&#9670;&nbsp;</a></span>XSDPS_PSR_RD_ACTIVE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_RD_ACTIVE_MASK&#160;&#160;&#160;0x00000200U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Read transfer active. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize()</a>.</p>

</div>
</div>
<a id="gad90261cc9ec8c3fa2941ecb3109cfc19"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad90261cc9ec8c3fa2941ecb3109cfc19">&#9670;&nbsp;</a></span>XSDPS_PSR_RE_TUNING_REQ_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_RE_TUNING_REQ_MASK&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Re-tuning request. </p>

</div>
</div>
<a id="gadb508485d69d735a8d54d7e649eb7e07"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadb508485d69d735a8d54d7e649eb7e07">&#9670;&nbsp;</a></span>XSDPS_PSR_WPS_PL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_WPS_PL_MASK&#160;&#160;&#160;0x00080000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Write protect switch pin level. </p>

</div>
</div>
<a id="ga3ca4326266616d0253a9064eca4cbe51"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3ca4326266616d0253a9064eca4cbe51">&#9670;&nbsp;</a></span>XSDPS_PSR_WR_ACTIVE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_PSR_WR_ACTIVE_MASK&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Write transfer active. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize()</a>.</p>

</div>
</div>
<a id="ga55b39729f5e5ec333e1729e49c0a3fa0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga55b39729f5e5ec333e1729e49c0a3fa0">&#9670;&nbsp;</a></span>XSDPS_RESP0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_RESP0_OFFSET&#160;&#160;&#160;0x10U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response0 Register. </p>

</div>
</div>
<a id="ga4ef21ca256af8f6995a821455faaa8e1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4ef21ca256af8f6995a821455faaa8e1">&#9670;&nbsp;</a></span>XSDPS_RESP1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_RESP1_OFFSET&#160;&#160;&#160;0x14U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response1 Register. </p>

</div>
</div>
<a id="gabe4ecffa571fb726055106837a2c6b15"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabe4ecffa571fb726055106837a2c6b15">&#9670;&nbsp;</a></span>XSDPS_RESP2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_RESP2_OFFSET&#160;&#160;&#160;0x18U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response2 Register. </p>

</div>
</div>
<a id="gab17cd4546023e6afde6c96141aa35cd6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab17cd4546023e6afde6c96141aa35cd6">&#9670;&nbsp;</a></span>XSDPS_RESP3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_RESP3_OFFSET&#160;&#160;&#160;0x1CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Response3 Register. </p>

</div>
</div>
<a id="ga34bf5de34374014e5a35b2fd77ae6182"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga34bf5de34374014e5a35b2fd77ae6182">&#9670;&nbsp;</a></span>XSDPS_SDMA_BUFF_SIZE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SDMA_BUFF_SIZE_MASK&#160;&#160;&#160;0x00007000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Host SDMA Buffer Size. </p>

</div>
</div>
<a id="gad0e1c3a4ac4fc0c8aed692943dc44935"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad0e1c3a4ac4fc0c8aed692943dc44935">&#9670;&nbsp;</a></span>XSDPS_SDMA_SYS_ADDR_HI_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SDMA_SYS_ADDR_HI_OFFSET&#160;&#160;&#160;0x02U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDMA System Address High Register. </p>

</div>
</div>
<a id="gad77f2583a29a5df31c54ed67a95fc893"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad77f2583a29a5df31c54ed67a95fc893">&#9670;&nbsp;</a></span>XSDPS_SDMA_SYS_ADDR_LO_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SDMA_SYS_ADDR_LO_OFFSET&#160;&#160;&#160;<a class="el" href="group__sdps__v2__5.html#ga1b844dcb0ed53494ee47d19303e8fdee">XSDPS_SDMA_SYS_ADDR_OFFSET</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDMA System Address Low Register. </p>

</div>
</div>
<a id="ga1b844dcb0ed53494ee47d19303e8fdee"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1b844dcb0ed53494ee47d19303e8fdee">&#9670;&nbsp;</a></span>XSDPS_SDMA_SYS_ADDR_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SDMA_SYS_ADDR_OFFSET&#160;&#160;&#160;0x00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>SDMA System Address Register. </p>

</div>
</div>
<a id="gafe47ca8a96807b4fb22f09ee18f0c19d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafe47ca8a96807b4fb22f09ee18f0c19d">&#9670;&nbsp;</a></span>XSDPS_SHARED_BUS_CTRL_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SHARED_BUS_CTRL_OFFSET&#160;&#160;&#160;0xE0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Shared Bus Control Register. </p>

</div>
</div>
<a id="gab48f3cb96498fbb0d844ee725b296231"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab48f3cb96498fbb0d844ee725b296231">&#9670;&nbsp;</a></span>XSDPS_SLOT_INTR_STS_INT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SLOT_INTR_STS_INT_MASK&#160;&#160;&#160;0x0007U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Interrupt Signal mask. </p>

</div>
</div>
<a id="ga536885cdab156a2e09a9ace5c8da10ab"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga536885cdab156a2e09a9ace5c8da10ab">&#9670;&nbsp;</a></span>XSDPS_SLOT_INTR_STS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SLOT_INTR_STS_OFFSET&#160;&#160;&#160;0xFCU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Slot Interrupt Status Register. </p>

</div>
</div>
<a id="gad4a22634c50518cb7a595ebbe3ef6efa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad4a22634c50518cb7a595ebbe3ef6efa">&#9670;&nbsp;</a></span>XSDPS_SW_RST_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_SW_RST_OFFSET&#160;&#160;&#160;0x2FU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Software Reset. </p>

</div>
</div>
<a id="ga07b5d7d7fd452540c9a5a2f531e0f82d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga07b5d7d7fd452540c9a5a2f531e0f82d">&#9670;&nbsp;</a></span>XSDPS_TIMEOUT_CTRL_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_TIMEOUT_CTRL_OFFSET&#160;&#160;&#160;0x2EU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Timeout Control. </p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="ga6ee1ea5d49f87e0e20ebdc0743ae9250"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6ee1ea5d49f87e0e20ebdc0743ae9250">&#9670;&nbsp;</a></span>XSDPS_TM_AUTO_CMD12_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_TM_AUTO_CMD12_EN_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Auto CMD12 Enable. </p>

</div>
</div>
<a id="gab68f2eb2928e7437148e9cd5d9b3a949"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab68f2eb2928e7437148e9cd5d9b3a949">&#9670;&nbsp;</a></span>XSDPS_TM_BLK_CNT_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_TM_BLK_CNT_EN_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Block Count Enable. </p>

</div>
</div>
<a id="ga99c6cb5b2afc9a13b2f7b2e03bb3ca5c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga99c6cb5b2afc9a13b2f7b2e03bb3ca5c">&#9670;&nbsp;</a></span>XSDPS_TM_DAT_DIR_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_TM_DAT_DIR_SEL_MASK&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Data Transfer Direction Select. </p>

</div>
</div>
<a id="ga0704e7175bffbe4b4f34c5597f2cf94f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0704e7175bffbe4b4f34c5597f2cf94f">&#9670;&nbsp;</a></span>XSDPS_TM_DMA_EN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_TM_DMA_EN_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>DMA Enable. </p>

</div>
</div>
<a id="ga85051ce8cc4a768d1e8e912e782ce02e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga85051ce8cc4a768d1e8e912e782ce02e">&#9670;&nbsp;</a></span>XSDPS_TM_MUL_SIN_BLK_SEL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_TM_MUL_SIN_BLK_SEL_MASK&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Multi/Single Block Select. </p>

</div>
</div>
<a id="gac9ae6a5e649bcb6a25e7f96c37c37947"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac9ae6a5e649bcb6a25e7f96c37c37947">&#9670;&nbsp;</a></span>XSDPS_WAKE_UP_CTRL_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_WAKE_UP_CTRL_OFFSET&#160;&#160;&#160;0x2BU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Wake Up Control. </p>

</div>
</div>
<a id="ga772a7f8b8878621f10f9edcdcf45fe09"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga772a7f8b8878621f10f9edcdcf45fe09">&#9670;&nbsp;</a></span>XSDPS_WC_WUP_ON_INSRT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_WC_WUP_ON_INSRT_MASK&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Wakeup Card Insert. </p>

</div>
</div>
<a id="gac45a8661339d777e1f802e38dcb782bf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac45a8661339d777e1f802e38dcb782bf">&#9670;&nbsp;</a></span>XSDPS_WC_WUP_ON_INTR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_WC_WUP_ON_INTR_MASK&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Wakeup Card Intr. </p>

</div>
</div>
<a id="gabee6427e5b18670be54a11474e9db014"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabee6427e5b18670be54a11474e9db014">&#9670;&nbsp;</a></span>XSDPS_WC_WUP_ON_REM_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_WC_WUP_ON_REM_MASK&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Wakeup Card Removal. </p>

</div>
</div>
<a id="ga3bd38fbe9d25ae96d5ba2a284fe88a78"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3bd38fbe9d25ae96d5ba2a284fe88a78">&#9670;&nbsp;</a></span>XSDPS_XFER_MODE_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XSDPS_XFER_MODE_OFFSET&#160;&#160;&#160;0x0CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps__hw_8h.html">xsdps_hw.h</a>&gt;</code></p>

<p>Transfer Mode Register. </p>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a id="ga3c3ab46b98e997b8439af4b149445811"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3c3ab46b98e997b8439af4b149445811">&#9670;&nbsp;</a></span>XSdPs_CardInitialize()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_CardInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>Initialize Card with Identification mode sequence. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance to be worked on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful</li>
<li>XST_FAILURE if failure - could be because a) SD is already initialized b) There is no card inserted c) One of the steps (commands) in the initialization cycle failed </li>
</ul>
</dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#a069e352a2e02b9a9c0f61787549817db">XSdPs::BusWidth</a>, and <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>.</p>

</div>
</div>
<a id="gabcd75a06ca4fb42ebcec4526282dffdf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabcd75a06ca4fb42ebcec4526282dffdf">&#9670;&nbsp;</a></span>XSdPs_CfgInitialize()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps___config.html">XSdPs_Config</a> *&#160;</td>
          <td class="paramname"><em>ConfigPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>Initializes a specific <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance such that the driver is ready to use. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance. </td></tr>
    <tr><td class="paramname">ConfigPtr</td><td>is a reference to a structure containing information about a specific SD device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use ConfigPtr-&gt;Config.BaseAddress for this device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function initializes the host controller. Initial clock of 400KHz is set. Voltage of 3.3V is selected as that is supported by host. Interrupts status is enabled and signal disabled by default. Default data direction is card to host and 32 bit ADMA2 is selected. Defualt Block size is 512 bytes. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps___config.html#a7fe36b608a4251f5b93c9c74cfb85e08">XSdPs_Config::BankNumber</a>, <a class="el" href="struct_x_sd_ps___config.html#a1292694414923fdc17e1f6a0e00db2f6">XSdPs_Config::BaseAddress</a>, <a class="el" href="struct_x_sd_ps___config.html#aea317a5fc926ce97c26cd7deeecb0c0f">XSdPs_Config::BusWidth</a>, <a class="el" href="struct_x_sd_ps___config.html#a494f4186575a737efe3f8b3b9848c3c7">XSdPs_Config::CardDetect</a>, <a class="el" href="struct_x_sd_ps.html#a9ab6ed4e7a1155a0708152ca2f27d650">XSdPs::Config</a>, <a class="el" href="struct_x_sd_ps___config.html#a02ef7758fed8299c73c8dff376c7a166">XSdPs_Config::DeviceId</a>, <a class="el" href="struct_x_sd_ps___config.html#a892a82eef72bba816d1576cc8b4aa1ba">XSdPs_Config::HasEMIO</a>, <a class="el" href="struct_x_sd_ps___config.html#a0f3c5d739bd1567d28b1ef827aedc75b">XSdPs_Config::InputClockHz</a>, <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>, <a class="el" href="struct_x_sd_ps.html#a2958388759de8ad51b37dcd814f96be3">XSdPs::Mode</a>, <a class="el" href="struct_x_sd_ps.html#afb72007125fc5046392961ad99999ad9">XSdPs::SectorCount</a>, and <a class="el" href="struct_x_sd_ps___config.html#a096af7ddafe53bdf7e4359f3555ae2c4">XSdPs_Config::WriteProtect</a>.</p>

</div>
</div>
<a id="ga6bc000fb4ce51502058f2e351c90fc19"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6bc000fb4ce51502058f2e351c90fc19">&#9670;&nbsp;</a></span>XSdPs_Change_BusSpeed()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Change_BusSpeed </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to set high speed in card and host. </p>
<p>Changes clock in host accordingly.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#ace9a2dd34b39f3100f97fcd50883f833">XSdPs::CardType</a>, and <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>.</p>

</div>
</div>
<a id="gaf11db1719933123762fecb790a2977da"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf11db1719933123762fecb790a2977da">&#9670;&nbsp;</a></span>XSdPs_Change_BusWidth()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Change_BusWidth </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to set bus width to 4-bit in card and host. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#a11d4222e3ecae1a01aa4c3e34a00ef35">XSdPs::HC_Version</a>, and <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>.</p>

</div>
</div>
<a id="ga1f8661e4ae53a7c29b3fd44cc56a3673"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1f8661e4ae53a7c29b3fd44cc56a3673">&#9670;&nbsp;</a></span>XSdPs_Change_ClkFreq()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Change_ClkFreq </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>SelFreq</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to change clock freq to given value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance. </td></tr>
    <tr><td class="paramname">SelFreq</td><td>- Clock frequency in Hz.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This API will change clock frequency to the value less than or equal to the given value using the permissible dividors. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps___config.html#a1292694414923fdc17e1f6a0e00db2f6">XSdPs_Config::BaseAddress</a>, <a class="el" href="struct_x_sd_ps.html#a9ab6ed4e7a1155a0708152ca2f27d650">XSdPs::Config</a>, <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>, <a class="el" href="group__sdps__v2__5.html#ga6386e0e4144576279df5f50d2e38625a">XSDPS_CLK_CTRL_OFFSET</a>, and <a class="el" href="xsdps__hw_8h.html#ac8bb7456993f8b6896274b04ca8f763f">XSdPs_ReadReg16</a>.</p>

</div>
</div>
<a id="ga1c5c45efb0402b9d8e6a33d036dbd220"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1c5c45efb0402b9d8e6a33d036dbd220">&#9670;&nbsp;</a></span>XSdPs_CmdTransfer()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_CmdTransfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Cmd</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Arg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BlkCnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>This function does SD command generation. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance to be worked on. </td></tr>
    <tr><td class="paramname">Cmd</td><td>is the command to be sent. </td></tr>
    <tr><td class="paramname">Arg</td><td>is the argument to be sent along with the command. This could be address or any other information </td></tr>
    <tr><td class="paramname">BlkCnt</td><td>- Block count passed by the user.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful</li>
<li>XST_FAILURE if failure - could be because another transfer is in progress or command or data inhibit is set </li>
</ul>
</dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps___config.html#a1292694414923fdc17e1f6a0e00db2f6">XSdPs_Config::BaseAddress</a>, <a class="el" href="struct_x_sd_ps.html#a9ab6ed4e7a1155a0708152ca2f27d650">XSdPs::Config</a>, <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>, <a class="el" href="group__sdps__v2__5.html#ga0f629f596d2bcbdac2d2064dd834222e">XSDPS_ARGMT_OFFSET</a>, <a class="el" href="group__sdps__v2__5.html#gae0c324dd75ec228b0f7983f227202675">XSDPS_BLK_CNT_OFFSET</a>, <a class="el" href="group__sdps__v2__5.html#ga2aa0027ce006eb71c2a954f66643ab54">XSDPS_NORM_INTR_STS_OFFSET</a>, <a class="el" href="group__sdps__v2__5.html#gac4498ffd6183ea9be4bee7d2f178d8d0">XSDPS_PRES_STATE_OFFSET</a>, <a class="el" href="group__sdps__v2__5.html#ga202c8bc912a7f2b42afdd10887f0c493">XSDPS_PSR_INHIBIT_CMD_MASK</a>, <a class="el" href="xsdps__hw_8h.html#a646a41608d5de978c0a20b3e762ecf8e">XSdPs_ReadReg</a>, <a class="el" href="group__sdps__v2__5.html#ga07b5d7d7fd452540c9a5a2f531e0f82d">XSDPS_TIMEOUT_CTRL_OFFSET</a>, <a class="el" href="xsdps__hw_8h.html#ac4aa5ec8c5cdb784b1741a7c940c707d">XSdPs_WriteReg</a>, <a class="el" href="xsdps__hw_8h.html#ab82227212d9a9ff62265b208260b54df">XSdPs_WriteReg16</a>, and <a class="el" href="xsdps__hw_8h.html#a999a865f3f058ecb95492e88e6807210">XSdPs_WriteReg8</a>.</p>

<p class="reference">Referenced by <a class="el" href="group__sdps__v2__5.html#ga779d417f6a1e5d772b017a92485583a1">XSdPs_Get_BusWidth()</a>, <a class="el" href="group__sdps__v2__5.html#ga0be8518af877aa1fe5f7c6b86ac4f7f8">XSdPs_Pullup()</a>, <a class="el" href="group__sdps__v2__5.html#ga17d43f52a8948d5ec4f315641336d115">XSdPs_Select_Card()</a>, <a class="el" href="group__sdps__v2__5.html#gaee773eef8e260b4498dc607061eb18f6">XSdPs_Set_Mmc_ExtCsd()</a>, and <a class="el" href="group__sdps__v2__5.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize()</a>.</p>

</div>
</div>
<a id="ga959b013962a6b53aa1c52f8ed78153be"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga959b013962a6b53aa1c52f8ed78153be">&#9670;&nbsp;</a></span>XSdPs_FrameCmd()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XSdPs_FrameCmd </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Cmd</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>This function frames the Command register for a particular command. </p>
<p>Note that this generates only the command register value i.e. the upper 16 bits of the transfer mode and command register. This value is already shifted to be upper 16 bits and can be directly OR'ed with transfer mode register value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Command</td><td>to be sent.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Command register value complete with response type and data, CRC and index related flags. </dd></dl>

</div>
</div>
<a id="gafc7e71cb62142d0ef939336195102666"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafc7e71cb62142d0ef939336195102666">&#9670;&nbsp;</a></span>XSdPs_Get_BusSpeed()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Get_BusSpeed </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>ReadBuff</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to get bus speed supported by card. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance. </td></tr>
    <tr><td class="paramname">ReadBuff</td><td>- buffer to store function group support data returned by card.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>.</p>

</div>
</div>
<a id="ga779d417f6a1e5d772b017a92485583a1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga779d417f6a1e5d772b017a92485583a1">&#9670;&nbsp;</a></span>XSdPs_Get_BusWidth()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Get_BusWidth </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>SCR</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to get bus width support by card. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance. </td></tr>
    <tr><td class="paramname">SCR</td><td>- buffer to store SCR register returned by card.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>, and <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="ga69e8d7cd927da4273a12d0d5fb3f36ff"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga69e8d7cd927da4273a12d0d5fb3f36ff">&#9670;&nbsp;</a></span>XSdPs_Get_Mmc_ExtCsd()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Get_Mmc_ExtCsd </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>ReadBuff</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to get EXT_CSD register of eMMC. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance. </td></tr>
    <tr><td class="paramname">ReadBuff</td><td>- buffer to store EXT_CSD</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>.</p>

</div>
</div>
<a id="ga27d6bd37204cdb0c26430efedd8e97eb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga27d6bd37204cdb0c26430efedd8e97eb">&#9670;&nbsp;</a></span>XSdPs_LookupConfig()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_sd_ps___config.html">XSdPs_Config</a> * XSdPs_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>Looks up the device configuration based on the unique device ID. </p>
<p>A table contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>contains the ID of the device to look up the configuration for.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<p>A pointer to the configuration found or NULL if the specified device ID was not found. See <a class="el" href="xsdps_8h.html">xsdps.h</a> for the definition of <a class="el" href="struct_x_sd_ps___config.html" title="This typedef contains configuration information for the device. ">XSdPs_Config</a>.</p>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<a id="gae55b1aa663629e99a9da94619c7487c5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae55b1aa663629e99a9da94619c7487c5">&#9670;&nbsp;</a></span>XSdPs_MmcCardInitialize()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_MmcCardInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>Mmc initialization is done in this function. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance to be worked on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful</li>
<li>XST_FAILURE if failure - could be because a) MMC is already initialized b) There is no card inserted c) One of the steps (commands) in the initialization cycle failed </li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function initializes the SD card by following its initialization and identification state diagram. CMD0 is sent to reset card. CMD1 sent to identify voltage and high capacity support CMD2 and CMD3 are sent to obtain Card ID and Relative card address respectively. CMD9 is sent to read the card specific data. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#a11d4222e3ecae1a01aa4c3e34a00ef35">XSdPs::HC_Version</a>, and <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>.</p>

</div>
</div>
<a id="ga0be8518af877aa1fe5f7c6b86ac4f7f8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0be8518af877aa1fe5f7c6b86ac4f7f8">&#9670;&nbsp;</a></span>XSdPs_Pullup()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Pullup </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to send pullup command to card before using DAT line 3(using 4-bit bus) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>, and <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="ga8dfe3686ed74d09a2a46a7b5cddcde47"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8dfe3686ed74d09a2a46a7b5cddcde47">&#9670;&nbsp;</a></span>XSdPs_ReadPolled()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_ReadPolled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Arg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BlkCnt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>Buff</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>This function performs SD read in polled mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance to be worked on. </td></tr>
    <tr><td class="paramname">Arg</td><td>is the address passed by the user that is to be sent as argument along with the command. </td></tr>
    <tr><td class="paramname">BlkCnt</td><td>- Block count passed by the user. </td></tr>
    <tr><td class="paramname">Buff</td><td>- Pointer to the data buffer for a DMA transfer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful</li>
<li>XST_FAILURE if failure - could be because another transfer is in progress or command or data inhibit is set </li>
</ul>
</dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#a11d4222e3ecae1a01aa4c3e34a00ef35">XSdPs::HC_Version</a>.</p>

</div>
</div>
<a id="ga8e9a576dfdb4440a795eb6e712994050"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8e9a576dfdb4440a795eb6e712994050">&#9670;&nbsp;</a></span>XSdPs_SdCardInitialize()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_SdCardInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>SD initialization is done in this function. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance to be worked on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful</li>
<li>XST_FAILURE if failure - could be because a) SD is already initialized b) There is no card inserted c) One of the steps (commands) in the initialization cycle failed</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function initializes the SD card by following its initialization and identification state diagram. CMD0 is sent to reset card. CMD8 and ACDM41 are sent to identify voltage and high capacity support CMD2 and CMD3 are sent to obtain Card ID and Relative card address respectively. CMD9 is sent to read the card specific data. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#a11d4222e3ecae1a01aa4c3e34a00ef35">XSdPs::HC_Version</a>, and <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>.</p>

</div>
</div>
<a id="ga17d43f52a8948d5ec4f315641336d115"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga17d43f52a8948d5ec4f315641336d115">&#9670;&nbsp;</a></span>XSdPs_Select_Card()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Select_Card </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>Selects card and sets default block size. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="gaee773eef8e260b4498dc607061eb18f6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaee773eef8e260b4498dc607061eb18f6">&#9670;&nbsp;</a></span>XSdPs_Set_Mmc_ExtCsd()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_Set_Mmc_ExtCsd </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Arg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>API to write EXT_CSD register of eMMC. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance. </td></tr>
    <tr><td class="paramname">Arg</td><td>is the argument to be sent along with the command</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if fail.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>.</p>

</div>
</div>
<a id="ga1af3178b4b24c991b431eb7a0aa3b23b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1af3178b4b24c991b431eb7a0aa3b23b">&#9670;&nbsp;</a></span>XSdPs_SetBlkSize()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_SetBlkSize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>BlkSize</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8h.html">xsdps.h</a>&gt;</code></p>

<p>Update Block size for read/write operations. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance to be worked on. </td></tr>
    <tr><td class="paramname">BlkSize</td><td>- Block size passed by the user.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps___config.html#a1292694414923fdc17e1f6a0e00db2f6">XSdPs_Config::BaseAddress</a>, <a class="el" href="struct_x_sd_ps.html#a9ab6ed4e7a1155a0708152ca2f27d650">XSdPs::Config</a>, <a class="el" href="struct_x_sd_ps.html#ab0fec7949e73bc680a138fbf644bd692">XSdPs::IsReady</a>, <a class="el" href="group__sdps__v2__5.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>, <a class="el" href="group__sdps__v2__5.html#gac4498ffd6183ea9be4bee7d2f178d8d0">XSDPS_PRES_STATE_OFFSET</a>, <a class="el" href="group__sdps__v2__5.html#ga202c8bc912a7f2b42afdd10887f0c493">XSDPS_PSR_INHIBIT_CMD_MASK</a>, <a class="el" href="group__sdps__v2__5.html#ga7814152da74fef6a4308ea81908ad0bb">XSDPS_PSR_INHIBIT_DAT_MASK</a>, <a class="el" href="group__sdps__v2__5.html#gad7191fb295684001ff129d277151548b">XSDPS_PSR_RD_ACTIVE_MASK</a>, <a class="el" href="group__sdps__v2__5.html#ga3ca4326266616d0253a9064eca4cbe51">XSDPS_PSR_WR_ACTIVE_MASK</a>, and <a class="el" href="xsdps__hw_8h.html#a646a41608d5de978c0a20b3e762ecf8e">XSdPs_ReadReg</a>.</p>

</div>
</div>
<a id="gaf9b8a29b65e1213b11ad22312e5f84be"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf9b8a29b65e1213b11ad22312e5f84be">&#9670;&nbsp;</a></span>XSdPs_SetupADMA2DescTbl()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XSdPs_SetupADMA2DescTbl </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BlkCnt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const u8 *&#160;</td>
          <td class="paramname"><em>Buff</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>API to setup ADMA2 descriptor table. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sd_ps.html" title="The XSdPs driver instance data. ">XSdPs</a> instance. </td></tr>
    <tr><td class="paramname">BlkCnt</td><td>- block count. </td></tr>
    <tr><td class="paramname">Buff</td><td>pointer to data buffer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps___config.html#a1292694414923fdc17e1f6a0e00db2f6">XSdPs_Config::BaseAddress</a>, <a class="el" href="struct_x_sd_ps.html#a9ab6ed4e7a1155a0708152ca2f27d650">XSdPs::Config</a>, <a class="el" href="group__sdps__v2__5.html#gaa50e45067119d5516ebd171efc11bdf1">XSDPS_BLK_SIZE_MASK</a>, <a class="el" href="group__sdps__v2__5.html#ga056c8c37db130b3e8f553e38190e4578">XSDPS_BLK_SIZE_OFFSET</a>, and <a class="el" href="xsdps__hw_8h.html#ac8bb7456993f8b6896274b04ca8f763f">XSdPs_ReadReg16</a>.</p>

</div>
</div>
<a id="ga69aa57979c1ef9b9ec3fbdc6d8ab7277"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga69aa57979c1ef9b9ec3fbdc6d8ab7277">&#9670;&nbsp;</a></span>XSdPs_WritePolled()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XSdPs_WritePolled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sd_ps.html">XSdPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Arg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BlkCnt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const u8 *&#160;</td>
          <td class="paramname"><em>Buff</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xsdps_8c.html">xsdps.c</a>&gt;</code></p>

<p>This function performs SD write in polled mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance to be worked on. </td></tr>
    <tr><td class="paramname">Arg</td><td>is the address passed by the user that is to be sent as argument along with the command. </td></tr>
    <tr><td class="paramname">BlkCnt</td><td>- Block count passed by the user. </td></tr>
    <tr><td class="paramname">Buff</td><td>- Pointer to the data buffer for a DMA transfer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful</li>
<li>XST_FAILURE if failure - could be because another transfer is in progress or command or data inhibit is set </li>
</ul>
</dd></dl>

<p class="reference">References <a class="el" href="struct_x_sd_ps.html#a11d4222e3ecae1a01aa4c3e34a00ef35">XSdPs::HC_Version</a>.</p>

</div>
</div>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
  <ul>
    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
  </ul>
</div>
</body>
</html>
